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Re: [PATCH 03/28] tcg/aarch64: Support bswap flags
From: |
Peter Maydell |
Subject: |
Re: [PATCH 03/28] tcg/aarch64: Support bswap flags |
Date: |
Mon, 21 Jun 2021 20:40:03 +0100 |
On Mon, 21 Jun 2021 at 19:12, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 6/21/21 7:01 AM, Peter Maydell wrote:
> > Side note: it's rather confusing that tcg_out_rev32() doesn't
> > emit a REV32 insn (it emits REV with sf==0).
>
> Which is REV with SF=0 also has OPC=10, which is REV32.
No, REV32 has SF=1. The two operations are different:
REV <Wd>, <Wn> -- swaps byte order of the bottom 32 bits
(zeroes the top half of Xd, as usual for Wn ops)
REV32 <Xd>, <Xn> -- swaps byte order of bottom 32 bits and
also swaps byte order of top 32 bits
(ie it is a 64-bit to 64-bit operation
which does does two bswap32()s)
-- PMM
[PATCH 04/28] tcg/arm: Support bswap flags, Richard Henderson, 2021/06/14
[PATCH 05/28] tcg/ppc: Split out tcg_out_ext{8,16,32}s, Richard Henderson, 2021/06/14
[PATCH 01/28] tcg: Add flags argument to bswap opcodes, Richard Henderson, 2021/06/14