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[PULL 08/15] target/mips: Restrict some system specific declarations to
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 08/15] target/mips: Restrict some system specific declarations to sysemu |
Date: |
Fri, 25 Jun 2021 11:23:22 +0200 |
Commit 043715d1e0f ("target/mips: Update ITU to utilize SAARI
and SAAR CP0 registers") declared itc_reconfigure() in public
namespace, while it is restricted to system emulation.
Similarly commit 5679479b9a1 ("target/mips: Move CP0 helpers
to sysemu/cp0.c") restricted cpu_mips_soft_irq() definition to
system emulation, but forgot to restrict its declaration.
To avoid polluting user-mode emulation with these declarations,
restrict them to sysemu. Also restrict the sysemu ITU/ITC/IRQ
fields from CPUMIPSState.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210617174323.2900831-6-f4bug@amsat.org>
---
target/mips/cpu.h | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 075c24abdad..1dfe69c6c0c 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -1152,13 +1152,13 @@ struct CPUMIPSState {
CPUMIPSMVPContext *mvp;
#if !defined(CONFIG_USER_ONLY)
CPUMIPSTLBContext *tlb;
+ void *irq[8];
+ struct MIPSITUState *itu;
+ MemoryRegion *itc_tag; /* ITC Configuration Tags */
#endif
const mips_def_t *cpu_model;
- void *irq[8];
QEMUTimer *timer; /* Internal timer */
- struct MIPSITUState *itu;
- MemoryRegion *itc_tag; /* ITC Configuration Tags */
target_ulong exception_base; /* ExceptionBase input to the core */
uint64_t cp0_count_ns; /* CP0_Count clock period (in nanoseconds) */
};
@@ -1316,12 +1316,16 @@ uint64_t cpu_mips_phys_to_kseg1(void *opaque, uint64_t
addr);
bool mips_um_ksegs_enabled(void);
void mips_um_ksegs_enable(void);
+#if !defined(CONFIG_USER_ONLY)
+
/* mips_int.c */
void cpu_mips_soft_irq(CPUMIPSState *env, int irq, int level);
/* mips_itu.c */
void itc_reconfigure(struct MIPSITUState *tag);
+#endif /* !CONFIG_USER_ONLY */
+
/* helper.c */
target_ulong exception_resume_pc(CPUMIPSState *env);
--
2.31.1
- [PULL 00/15] MIPS patches for 2021-06-25, Philippe Mathieu-Daudé, 2021/06/25
- [PULL 01/15] target/mips: Fix potential integer overflow (CID 1452921), Philippe Mathieu-Daudé, 2021/06/25
- [PULL 02/15] target/mips: Fix TCG temporary leaks in gen_pool32a5_nanomips_insn(), Philippe Mathieu-Daudé, 2021/06/25
- [PULL 03/15] target/mips: Fix more TCG temporary leaks in gen_pool32a5_nanomips_insn, Philippe Mathieu-Daudé, 2021/06/25
- [PULL 04/15] target/mips: Raise exception when DINSV opcode used with DSP disabled, Philippe Mathieu-Daudé, 2021/06/25
- [PULL 05/15] target/mips: Do not abort on invalid instruction, Philippe Mathieu-Daudé, 2021/06/25
- [PULL 06/15] target/mips: Move TCG trace events to tcg/ sub directory, Philippe Mathieu-Daudé, 2021/06/25
- [PULL 07/15] target/mips: Move translate.h to tcg/ sub directory, Philippe Mathieu-Daudé, 2021/06/25
- [PULL 08/15] target/mips: Restrict some system specific declarations to sysemu,
Philippe Mathieu-Daudé <=
- [PULL 09/15] target/mips: Remove SmartMIPS / MDMX unuseful comments, Philippe Mathieu-Daudé, 2021/06/25
- [PULL 10/15] target/mips: Remove microMIPS BPOSGE32 / BPOSGE64 unuseful cases, Philippe Mathieu-Daudé, 2021/06/25
- [PULL 11/15] target/mips: fix emulation of nanoMIPS BPOSGE32 instruction, Philippe Mathieu-Daudé, 2021/06/25
- [PULL 12/15] target/mips: Constify host_to_mips_errno[], Philippe Mathieu-Daudé, 2021/06/25
- [PULL 13/15] target/mips: Optimize regnames[] arrays, Philippe Mathieu-Daudé, 2021/06/25
- [PULL 14/15] target/mips: Remove pointless gen_msa(), Philippe Mathieu-Daudé, 2021/06/25
- [PULL 15/15] target/mips: Merge msa32/msa64 decodetree definitions, Philippe Mathieu-Daudé, 2021/06/25
- Re: [PULL 00/15] MIPS patches for 2021-06-25, Peter Maydell, 2021/06/28