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[PULL 08/63] target/nios2: Inline handle_instruction
From: |
Richard Henderson |
Subject: |
[PULL 08/63] target/nios2: Inline handle_instruction |
Date: |
Tue, 29 Jun 2021 11:54:00 -0700 |
Move handle_instruction into nios2_tr_translate_insn
as the only caller.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/nios2/translate.c | 66 +++++++++++++++++++---------------------
1 file changed, 31 insertions(+), 35 deletions(-)
diff --git a/target/nios2/translate.c b/target/nios2/translate.c
index 9e71267b42..abc7e5f96a 100644
--- a/target/nios2/translate.c
+++ b/target/nios2/translate.c
@@ -735,38 +735,6 @@ illegal_op:
t_gen_helper_raise_exception(dc, EXCP_ILLEGAL);
}
-static void handle_instruction(DisasContext *dc, CPUNios2State *env)
-{
- uint32_t code;
- uint8_t op;
- const Nios2Instruction *instr;
-
-#if defined(CONFIG_USER_ONLY)
- /* FIXME: Is this needed ? */
- if (dc->pc >= 0x1000 && dc->pc < 0x2000) {
- t_gen_helper_raise_exception(dc, 0xaa);
- return;
- }
-#endif
-
- code = cpu_ldl_code(env, dc->pc);
- op = get_opcode(code);
-
- if (unlikely(op >= ARRAY_SIZE(i_type_instructions))) {
- t_gen_helper_raise_exception(dc, EXCP_ILLEGAL);
- return;
- }
-
- dc->zero = NULL;
-
- instr = &i_type_instructions[op];
- instr->handler(dc, code, instr->flags);
-
- if (dc->zero) {
- tcg_temp_free(dc->zero);
- }
-}
-
static const char * const regnames[] = {
"zero", "at", "r2", "r3",
"r4", "r5", "r6", "r7",
@@ -842,12 +810,40 @@ static void nios2_tr_translate_insn(DisasContextBase
*dcbase, CPUState *cs)
{
DisasContext *dc = container_of(dcbase, DisasContext, base);
CPUNios2State *env = cs->env_ptr;
+ const Nios2Instruction *instr;
+ uint32_t code, pc;
+ uint8_t op;
- dc->pc = dc->base.pc_next;
- dc->base.pc_next += 4;
+ pc = dc->base.pc_next;
+ dc->pc = pc;
+ dc->base.pc_next = pc + 4;
/* Decode an instruction */
- handle_instruction(dc, env);
+
+#if defined(CONFIG_USER_ONLY)
+ /* FIXME: Is this needed ? */
+ if (pc >= 0x1000 && pc < 0x2000) {
+ t_gen_helper_raise_exception(dc, 0xaa);
+ return;
+ }
+#endif
+
+ code = cpu_ldl_code(env, pc);
+ op = get_opcode(code);
+
+ if (unlikely(op >= ARRAY_SIZE(i_type_instructions))) {
+ t_gen_helper_raise_exception(dc, EXCP_ILLEGAL);
+ return;
+ }
+
+ dc->zero = NULL;
+
+ instr = &i_type_instructions[op];
+ instr->handler(dc, code, instr->flags);
+
+ if (dc->zero) {
+ tcg_temp_free(dc->zero);
+ }
}
static void nios2_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)
--
2.25.1
- [PULL 00/63] tcg patch queue, Richard Henderson, 2021/06/29
- [PULL 01/63] target/nios2: Replace DISAS_TB_JUMP with DISAS_NORETURN, Richard Henderson, 2021/06/29
- [PULL 02/63] target/nios2: Use global cpu_env, Richard Henderson, 2021/06/29
- [PULL 03/63] target/nios2: Use global cpu_R, Richard Henderson, 2021/06/29
- [PULL 06/63] target/nios2: Remove assignment to env in handle_instruction, Richard Henderson, 2021/06/29
- [PULL 04/63] target/nios2: Add DisasContextBase to DisasContext, Richard Henderson, 2021/06/29
- [PULL 05/63] target/nios2: Convert to TranslatorOps, Richard Henderson, 2021/06/29
- [PULL 07/63] target/nios2: Clean up goto in handle_instruction, Richard Henderson, 2021/06/29
- [PULL 08/63] target/nios2: Inline handle_instruction,
Richard Henderson <=
- [PULL 12/63] target/avr: Convert to TranslatorOps, Richard Henderson, 2021/06/29
- [PULL 09/63] target/nios2: Use pc_next for pc + 4, Richard Henderson, 2021/06/29
- [PULL 17/63] target/cris: Fix use_goto_tb, Richard Henderson, 2021/06/29
- [PULL 29/63] tcg: Add tcg_gen_vec_add{sub}16_i32, Richard Henderson, 2021/06/29
- [PULL 22/63] target/cris: Set cpustate_changed for rfe/rfn, Richard Henderson, 2021/06/29
- [PULL 19/63] target/cris: Mark helper_raise_exception noreturn, Richard Henderson, 2021/06/29
- [PULL 15/63] target/cris: Replace DISAS_TB_JUMP with DISAS_NORETURN, Richard Henderson, 2021/06/29
- [PULL 13/63] target/cris: Add DisasContextBase to DisasContext, Richard Henderson, 2021/06/29
- [PULL 18/63] target/cris: Convert to TranslatorOps, Richard Henderson, 2021/06/29
- [PULL 11/63] target/avr: Change ctx to DisasContext* in gen_intermediate_code, Richard Henderson, 2021/06/29