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[PULL 06/18] hw/pci-host/bonito: Allow PCI config accesses smaller than
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 06/18] hw/pci-host/bonito: Allow PCI config accesses smaller than 32-bit |
Date: |
Fri, 2 Jul 2021 15:35:45 +0200 |
When running the official PMON firmware for the Fuloong 2E, we see
8-bit and 16-bit accesses to PCI config space:
$ qemu-system-mips64el -M fuloong2e -bios pmon_2e.bin \
-trace -trace bonito\* -trace pci_cfg\*
pci_cfg_write vt82c686b-pm 05:4 @0x90 <- 0xeee1
bonito_spciconf_small_access PCI config address is smaller then 32-bit, addr:
0x4d2, size: 2
pci_cfg_write vt82c686b-pm 05:4 @0xd2 <- 0x1
pci_cfg_write vt82c686b-pm 05:4 @0x4 <- 0x1
pci_cfg_write vt82c686b-isa 05:0 @0x4 <- 0x7
bonito_spciconf_small_access PCI config address is smaller then 32-bit, addr:
0x81, size: 1
pci_cfg_read vt82c686b-isa 05:0 @0x81 -> 0x0
bonito_spciconf_small_access PCI config address is smaller then 32-bit, addr:
0x81, size: 1
pci_cfg_write vt82c686b-isa 05:0 @0x81 <- 0x80
bonito_spciconf_small_access PCI config address is smaller then 32-bit, addr:
0x83, size: 1
pci_cfg_write vt82c686b-isa 05:0 @0x83 <- 0x89
bonito_spciconf_small_access PCI config address is smaller then 32-bit, addr:
0x85, size: 1
pci_cfg_write vt82c686b-isa 05:0 @0x85 <- 0x3
bonito_spciconf_small_access PCI config address is smaller then 32-bit, addr:
0x5a, size: 1
pci_cfg_write vt82c686b-isa 05:0 @0x5a <- 0x7
bonito_spciconf_small_access PCI config address is smaller then 32-bit, addr:
0x85, size: 1
pci_cfg_write vt82c686b-isa 05:0 @0x85 <- 0x1
Also this is what the Linux kernel does since it supports the Bonito
north bridge:
https://elixir.bootlin.com/linux/v2.6.15/source/arch/mips/pci/ops-bonito64.c#L85
So it seems safe to assume the datasheet is incomplete or outdated
regarding the address constraints.
This problem was exposed by commit 911629e6d3773a8adeab48b
("vt82c686: Fix SMBus IO base and configuration registers").
Reported-by: BALATON Zoltan <balaton@eik.bme.hu>
Suggested-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210624202747.1433023-4-f4bug@amsat.org>
---
hw/pci-host/bonito.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index 751fdcec689..a57e81e3a97 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -187,7 +187,7 @@ FIELD(BONGENCFG, PCIQUEUE, 12, 1)
#define BONITO_PCICONF_FUN_MASK 0x700 /* [10:8] */
#define BONITO_PCICONF_FUN_OFFSET 8
#define BONITO_PCICONF_REG_MASK_DS (~3) /* Per datasheet */
-#define BONITO_PCICONF_REG_MASK 0xFC
+#define BONITO_PCICONF_REG_MASK_HW 0xff /* As seen running PMON */
#define BONITO_PCICONF_REG_OFFSET 0
@@ -466,7 +466,7 @@ static uint32_t bonito_sbridge_pciaddr(void *opaque, hwaddr
addr)
BONITO_PCICONF_IDSEL_OFFSET;
devno = ctz32(idsel);
funno = (cfgaddr & BONITO_PCICONF_FUN_MASK) >> BONITO_PCICONF_FUN_OFFSET;
- regno = (cfgaddr & BONITO_PCICONF_REG_MASK) >> BONITO_PCICONF_REG_OFFSET;
+ regno = (cfgaddr & BONITO_PCICONF_REG_MASK_HW) >>
BONITO_PCICONF_REG_OFFSET;
if (idsel == 0) {
error_report("error in bonito pci config address 0x" TARGET_FMT_plx
--
2.31.1
- [PULL 00/18] MIPS patches for 2021-07-02, Philippe Mathieu-Daudé, 2021/07/02
- [PULL 01/18] target/mips: Add declarations for generic TCG helpers, Philippe Mathieu-Daudé, 2021/07/02
- [PULL 02/18] target/mips: Extract Code Compaction ASE translation routines, Philippe Mathieu-Daudé, 2021/07/02
- [PULL 03/18] target/mips: Extract the microMIPS ISA translation routines, Philippe Mathieu-Daudé, 2021/07/02
- [PULL 04/18] target/mips: Extract nanoMIPS ISA translation routines, Philippe Mathieu-Daudé, 2021/07/02
- [PULL 05/18] hw/pci-host/bonito: Trace PCI config accesses smaller than 32-bit, Philippe Mathieu-Daudé, 2021/07/02
- [PULL 06/18] hw/pci-host/bonito: Allow PCI config accesses smaller than 32-bit,
Philippe Mathieu-Daudé <=
- [PULL 07/18] tests/acceptance: Test Linux on the Fuloong 2E machine, Philippe Mathieu-Daudé, 2021/07/02
- [PULL 08/18] g364fb: use RAM memory region for framebuffer, Philippe Mathieu-Daudé, 2021/07/02
- [PULL 09/18] g364fb: add VMStateDescription for G364SysBusState, Philippe Mathieu-Daudé, 2021/07/02
- [PULL 10/18] dp8393x: checkpatch fixes, Philippe Mathieu-Daudé, 2021/07/02
- [PULL 11/18] dp8393x: convert to trace-events, Philippe Mathieu-Daudé, 2021/07/02
- [PULL 12/18] hw/mips/jazz: move PROM and checksum calculation from dp8393x device to board, Philippe Mathieu-Daudé, 2021/07/02
- [PULL 13/18] hw/m68k/q800: move PROM and checksum calculation from dp8393x device to board, Philippe Mathieu-Daudé, 2021/07/02
- [PULL 14/18] dp8393x: remove onboard PROM containing MAC address and checksum, Philippe Mathieu-Daudé, 2021/07/02
- [PULL 15/18] qemu/bitops.h: add bitrev8 implementation, Philippe Mathieu-Daudé, 2021/07/02