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[PATCH v5 0/9] IOMMU: Add support for IOMMU Bypass Feature


From: Wang Xingang
Subject: [PATCH v5 0/9] IOMMU: Add support for IOMMU Bypass Feature
Date: Thu, 8 Jul 2021 12:55:10 +0000

From: Xingang Wang <wangxingang5@huawei.com>

Traditionally, there is a global switch to enable/disable vIOMMU. All
devices in the system can only support go through vIOMMU or not, which
is not flexible. We introduce this bypass iommu property to support
coexist of devices go through vIOMMU and devices not. This is useful to
passthrough devices with no-iommu mode and devices go through vIOMMU in
the same virtual machine.

PCI host bridges have a bypass_iommu property. This property is used to
determine whether the devices attached on the PCI host bridge will bypass
virtual iommu. The bypass_iommu property is valid only when there is a
virtual iommu in the system, it is implemented to allow some devices to
bypass vIOMMU. When bypass_iommu property is not set for a host bridge,
the attached devices will go through vIOMMU by default.

The bypass iommu feature support PXB host bridge and default main host
bridge, we add a bypass_iommu property for PXB and default_bus_bypass_iommu
for machine. Note that default_bus_bypass_iommu is available only when
the 'q35' machine type on x86 architecture and the 'virt' machine type
on AArch64. Other machine types do not support bypass iommu for default
root bus.

Here is how to use bypass iommu feature:
 (1) PCI expander bridge
     qemu -device pxb-pcie,bus_nr=0x10,addr=0x1,bypass_iommu=true
 (2) Arm default host bridge
     qemu -machine virt,iommu=smmuv3,default_bus_bypass_iommu=true
 (3) X86 default root bus bypass iommu:
     qemu -machine q35,default_bus_bypass_iommu=true

History:

v4 -> v5:
- Suggested by Igor, add docs/bypass-iommu.txt to describe bypass iommu
  feature in more detail, including motivation, usage and limitations.
- Add some small fixes, simplify the logic when building IORT idmap as
  suggested by Eric.
- 
https://lore.kernel.org/qemu-devel/1621914605-14724-1-git-send-email-wangxingang5@huawei.com/

v3 -> v4:
- simplify the logic in building the IORT idmap

v2 -> v3:
- rebase on top of v6.0.0-rc4
- Took into account Eric's comments, replace with a bypass_iommu
  proerty 
- When building the IORT idmap, cover the whole RID space

v1 -> v2:
- rebase on top of v6.0.0-rc0
- Fix some issues
- Took into account Eric's comments, and remove the PCI_BUS_IOMMU flag,
  replace it with a property in PCIHostState.
- Add support for x86 iommu option

Xingang Wang (9):
  hw/pci/pci_host: Allow PCI host to bypass iommu
  hw/pxb: Add a bypass iommu property
  hw/arm/virt: Add default_bus_bypass_iommu machine option
  hw/i386: Add a default_bus_bypass_iommu pc machine option
  hw/pci: Add pci_bus_range() to get PCI bus number range
  hw/arm/virt-acpi-build: Add IORT support to bypass SMMUv3
  hw/i386/acpi-build: Add DMAR support to bypass iommu
  hw/i386/acpi-build: Add IVRS support to bypass iommu
  docs: Add documentation for iommu bypass

 docs/bypass-iommu.txt               |  89 ++++++++++++++++++++++
 hw/arm/virt-acpi-build.c            | 114 +++++++++++++++++++++++++---
 hw/arm/virt.c                       |  26 +++++++
 hw/i386/acpi-build.c                |  70 ++++++++++++++++-
 hw/i386/pc.c                        |  20 +++++
 hw/pci-bridge/pci_expander_bridge.c |   3 +
 hw/pci-host/q35.c                   |   2 +
 hw/pci/pci.c                        |  34 ++++++++-
 hw/pci/pci_host.c                   |   1 +
 include/hw/arm/virt.h               |   1 +
 include/hw/i386/pc.h                |   1 +
 include/hw/pci/pci.h                |   2 +
 include/hw/pci/pci_host.h           |   1 +
 13 files changed, 349 insertions(+), 15 deletions(-)
 create mode 100644 docs/bypass-iommu.txt

-- 
2.19.1




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