[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH 03/17] target/riscv: Use gpr_{src,dst} in shift operations
From: |
Richard Henderson |
Subject: |
[PATCH 03/17] target/riscv: Use gpr_{src,dst} in shift operations |
Date: |
Thu, 8 Jul 2021 21:25:54 -0700 |
These operations are slightly more complicated since
we need to crop the shift operand.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/riscv/translate.c | 68 +++++++++++++++-------------------------
1 file changed, 26 insertions(+), 42 deletions(-)
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index 2cfcb849b8..a60b198623 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -778,18 +778,14 @@ static bool gen_arith(DisasContext *ctx, arg_r *a,
static bool gen_shift(DisasContext *ctx, arg_r *a,
void(*func)(TCGv, TCGv, TCGv))
{
- TCGv source1 = tcg_temp_new();
- TCGv source2 = tcg_temp_new();
+ TCGv dest = gpr_dst(ctx, a->rd);
+ TCGv src1 = gpr_src(ctx, a->rs1);
+ TCGv src2 = gpr_src(ctx, a->rs2);
+ TCGv ext2 = tcg_temp_new();
- gen_get_gpr(source1, a->rs1);
- gen_get_gpr(source2, a->rs2);
-
- tcg_gen_andi_tl(source2, source2, TARGET_LONG_BITS - 1);
- (*func)(source1, source1, source2);
-
- gen_set_gpr(a->rd, source1);
- tcg_temp_free(source1);
- tcg_temp_free(source2);
+ tcg_gen_andi_tl(ext2, src2, TARGET_LONG_BITS - 1);
+ (*func)(dest, src1, ext2);
+ tcg_temp_free(ext2);
return true;
}
@@ -805,58 +801,46 @@ static uint32_t opcode_at(DisasContextBase *dcbase,
target_ulong pc)
static bool gen_shifti(DisasContext *ctx, arg_shift *a,
void(*func)(TCGv, TCGv, TCGv))
{
+ TCGv dest, src1, src2;
+
if (a->shamt >= TARGET_LONG_BITS) {
return false;
}
- TCGv source1 = tcg_temp_new();
- TCGv source2 = tcg_temp_new();
+ dest = gpr_dst(ctx, a->rd);
+ src1 = gpr_src(ctx, a->rs1);
+ src2 = tcg_constant_tl(a->shamt);
- gen_get_gpr(source1, a->rs1);
-
- tcg_gen_movi_tl(source2, a->shamt);
- (*func)(source1, source1, source2);
-
- gen_set_gpr(a->rd, source1);
- tcg_temp_free(source1);
- tcg_temp_free(source2);
+ (*func)(dest, src1, src2);
return true;
}
static bool gen_shiftw(DisasContext *ctx, arg_r *a,
void(*func)(TCGv, TCGv, TCGv))
{
- TCGv source1 = tcg_temp_new();
- TCGv source2 = tcg_temp_new();
+ TCGv dest = gpr_dst(ctx, a->rd);
+ TCGv src1 = gpr_src(ctx, a->rs1);
+ TCGv src2 = gpr_src(ctx, a->rs2);
+ TCGv ext2 = tcg_temp_new();
- gen_get_gpr(source1, a->rs1);
- gen_get_gpr(source2, a->rs2);
+ tcg_gen_andi_tl(ext2, src2, 31);
+ (*func)(dest, src1, ext2);
+ tcg_gen_ext32s_tl(dest, dest);
- tcg_gen_andi_tl(source2, source2, 31);
- (*func)(source1, source1, source2);
- tcg_gen_ext32s_tl(source1, source1);
-
- gen_set_gpr(a->rd, source1);
- tcg_temp_free(source1);
- tcg_temp_free(source2);
+ tcg_temp_free(ext2);
return true;
}
static bool gen_shiftiw(DisasContext *ctx, arg_shift *a,
void(*func)(TCGv, TCGv, TCGv))
{
- TCGv source1 = tcg_temp_new();
- TCGv source2 = tcg_temp_new();
+ TCGv dest = gpr_dst(ctx, a->rd);
+ TCGv src1 = gpr_src(ctx, a->rs1);
+ TCGv src2 = tcg_constant_tl(a->shamt);
- gen_get_gpr(source1, a->rs1);
- tcg_gen_movi_tl(source2, a->shamt);
+ (*func)(dest, src1, src2);
+ tcg_gen_ext32s_tl(dest, dest);
- (*func)(source1, source1, source2);
- tcg_gen_ext32s_tl(source1, source1);
-
- gen_set_gpr(a->rd, source1);
- tcg_temp_free(source1);
- tcg_temp_free(source2);
return true;
}
--
2.25.1
- [PATCH 00/17] target/riscv: Use tcg_constant_*, Richard Henderson, 2021/07/09
- [PATCH 05/17] target/riscv: Use gpr_{src, dst} and tcg_constant_tl in gen_grevi, Richard Henderson, 2021/07/09
- [PATCH 01/17] target/riscv: Use tcg_constant_*, Richard Henderson, 2021/07/09
- [PATCH 02/17] target/riscv: Introduce gpr_src, gpr_dst, Richard Henderson, 2021/07/09
- [PATCH 04/17] target/riscv: Use gpr_{src, dst} in word division operations, Richard Henderson, 2021/07/09
- [PATCH 03/17] target/riscv: Use gpr_{src,dst} in shift operations,
Richard Henderson <=
- [PATCH 10/17] target/riscv: Use gpr_{src,dst} for RVA, Richard Henderson, 2021/07/09
- [PATCH 14/17] target/riscv: Tidy trans_rvh.c.inc, Richard Henderson, 2021/07/09
- [PATCH 06/17] target/riscv: Use gpr_src in branches, Richard Henderson, 2021/07/09
- [PATCH 16/17] target/riscv: Use gpr_{src,dst} for RVV, Richard Henderson, 2021/07/09
- [PATCH 07/17] target/riscv: Use gpr_{src,dst} for integer load/store, Richard Henderson, 2021/07/09