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[PULL 14/17] hw/gpio/pl061: Document a shortcoming in our implementation
From: |
Peter Maydell |
Subject: |
[PULL 14/17] hw/gpio/pl061: Document a shortcoming in our implementation |
Date: |
Fri, 9 Jul 2021 17:10:00 +0100 |
The Luminary PL061s in the Stellaris LM3S9695 don't all have the same
reset value for GPIOPUR. We can get away with not letting the board
configure the PUR reset value because we don't actually wire anything
up to the lines which should reset to pull-up. Add a comment noting
this omission.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/gpio/pl061.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/hw/gpio/pl061.c b/hw/gpio/pl061.c
index 4002ab51544..899be861cc5 100644
--- a/hw/gpio/pl061.c
+++ b/hw/gpio/pl061.c
@@ -453,6 +453,15 @@ static void pl061_enter_reset(Object *obj, ResetType type)
trace_pl061_reset(DEVICE(s)->canonical_path);
/* reset values from PL061 TRM, Stellaris LM3S5P31 & LM3S8962 Data Sheet */
+
+ /*
+ * FIXME: For the LM3S6965, not all of the PL061 instances have the
+ * same reset values for GPIOPUR, GPIOAFSEL and GPIODEN, so in theory
+ * we should allow the board to configure these via properties.
+ * In practice, we don't wire anything up to the affected GPIO lines
+ * (PB7, PC0, PC1, PC2, PC3 -- they're used for JTAG), so we can
+ * get away with this inaccuracy.
+ */
s->data = 0;
s->old_in_data = 0;
s->dir = 0;
--
2.20.1
- [PULL 09/17] hw/gpio/pl061: Document the interface of this device, (continued)
- [PULL 09/17] hw/gpio/pl061: Document the interface of this device, Peter Maydell, 2021/07/09
- [PULL 07/17] hw/gpio/pl061: Clean up read/write offset handling logic, Peter Maydell, 2021/07/09
- [PULL 06/17] hw/gpio/pl061: Convert DPRINTF to tracepoints, Peter Maydell, 2021/07/09
- [PULL 08/17] hw/gpio/pl061: Add tracepoints for register read and write, Peter Maydell, 2021/07/09
- [PULL 13/17] hw/gpio/pl061: Convert to 3-phase reset and assert GPIO lines correctly on reset, Peter Maydell, 2021/07/09
- [PULL 15/17] hw/arm/stellaris: Expand comment about handling of OLED chipselect, Peter Maydell, 2021/07/09
- [PULL 17/17] hw/intc: Improve formatting of MEMTX_ERROR guest error message, Peter Maydell, 2021/07/09
- [PULL 10/17] hw/gpio/pl061: Honour Luminary PL061 PUR and PDR registers, Peter Maydell, 2021/07/09
- [PULL 16/17] target/arm: Correct the encoding of MDCCSR_EL0 and DBGDSCRint, Peter Maydell, 2021/07/09
- [PULL 11/17] hw/gpio/pl061: Make pullup/pulldown of outputs configurable, Peter Maydell, 2021/07/09
- [PULL 14/17] hw/gpio/pl061: Document a shortcoming in our implementation,
Peter Maydell <=
- [PULL 12/17] hw/arm/virt: Make PL061 GPIO lines pulled low, not high, Peter Maydell, 2021/07/09
- Re: [PULL 00/17] target-arm queue, Peter Maydell, 2021/07/11