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[PULL 09/11] target/i386: Fix cpuid level for AMD
From: |
Eduardo Habkost |
Subject: |
[PULL 09/11] target/i386: Fix cpuid level for AMD |
Date: |
Tue, 13 Jul 2021 12:09:55 -0400 |
From: zhenwei pi <pizhenwei@bytedance.com>
A AMD server typically has cpuid level 0x10(test on Rome/Milan), it
should not be changed to 0x1f in multi-dies case.
* to maintain compatibility with older machine types, only implement
this change when the CPU's "x-vendor-cpuid-only" property is false
Cc: "Dr. David Alan Gilbert" <dgilbert@redhat.com>
Cc: Eduardo Habkost <ehabkost@redhat.com>
Cc: Richard Henderson <richard.henderson@linaro.org>
Cc: Igor Mammedov <imammedo@redhat.com>
Cc: zhenwei pi <pizhenwei@bytedance.com>
Fixes: a94e1428991 (target/i386: Add CPUID.1F generation support for multi-dies
PCMachine)
Signed-off-by: zhenwei pi <pizhenwei@bytedance.com>
Signed-off-by: Michael Roth <michael.roth@amd.com>
Message-Id: <20210708170641.49410-1-michael.roth@amd.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
target/i386/cpu.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 6b7043e4253..48b55ebd0a6 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -5950,8 +5950,15 @@ void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
}
}
- /* CPU topology with multi-dies support requires CPUID[0x1F] */
- if (env->nr_dies > 1) {
+ /*
+ * Intel CPU topology with multi-dies support requires CPUID[0x1F].
+ * For AMD Rome/Milan, cpuid level is 0x10, and guest OS should detect
+ * extended toplogy by leaf 0xB. Only adjust it for Intel CPU, unless
+ * cpu->vendor_cpuid_only has been unset for compatibility with older
+ * machine types.
+ */
+ if ((env->nr_dies > 1) &&
+ (IS_INTEL_CPU(env) || !cpu->vendor_cpuid_only)) {
x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x1F);
}
--
2.31.1
- Re: [PULL 04/11] i386: expand Hyper-V features during CPU feature expansion time, (continued)
- [PULL 05/11] i386: kill off hv_cpuid_check_and_set(), Eduardo Habkost, 2021/07/13
- [PULL 01/11] i386: clarify 'hv-passthrough' behavior, Eduardo Habkost, 2021/07/13
- [PULL 06/11] i386: HV_HYPERCALL_AVAILABLE privilege bit is always needed, Eduardo Habkost, 2021/07/13
- [PULL 07/11] i386: Hyper-V SynIC requires POST_MESSAGES/SIGNAL_EVENTS privileges, Eduardo Habkost, 2021/07/13
- [PULL 10/11] numa: Report expected initiator, Eduardo Habkost, 2021/07/13
- [PULL 11/11] numa: Parse initiator= attribute before cpus= attribute, Eduardo Habkost, 2021/07/13
- [PULL 02/11] i386: hardcode supported eVMCS version to '1', Eduardo Habkost, 2021/07/13
- [PULL 08/11] target/i386: suppress CPUID leaves not defined by the CPU vendor, Eduardo Habkost, 2021/07/13
- [PULL 09/11] target/i386: Fix cpuid level for AMD,
Eduardo Habkost <=
- Re: [PULL 00/11] x86 queue, 2021-07-13, Peter Maydell, 2021/07/14