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Re: [PATCH for-6.2 11/34] target/arm: Implement MVE VMULL (polynomial)


From: Richard Henderson
Subject: Re: [PATCH for-6.2 11/34] target/arm: Implement MVE VMULL (polynomial)
Date: Fri, 16 Jul 2021 10:14:40 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0

On 7/13/21 6:37 AM, Peter Maydell wrote:
Implement the MVE VMULL (polynomial) insn.  Unlike Neon, this comes
in two flavours: 8x8->16 and a 16x16->32.  Also unlike Neon, the
inputs are in either the low or the high half of each double-width
element.

The assembler for this insn indicates the size with "P8" or "P16",
encoded into bit 28 as size = 0 or 1. We choose to follow the
same encoding as VQDMULL and decode this into a->size as MO_16
or MO_32 indicating the size of the result elements. This then
carries through to the helper function names where it then
matches up with the existing pmull_h() which does an 8x8->16
operation and a new pmull_w() which does the 16x16->32.

Signed-off-by: Peter Maydell<peter.maydell@linaro.org>
---
  target/arm/helper-mve.h    |  5 +++++
  target/arm/vec_internal.h  | 11 +++++++++++
  target/arm/mve.decode      | 14 ++++++++++----
  target/arm/mve_helper.c    | 16 ++++++++++++++++
  target/arm/translate-mve.c | 28 ++++++++++++++++++++++++++++
  target/arm/vec_helper.c    | 14 +++++++++++++-
  6 files changed, 83 insertions(+), 5 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~



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