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Re: [PATCH for-6.2 17/34] target/arm: Implement MVE VMLAS

From: Richard Henderson
Subject: Re: [PATCH for-6.2 17/34] target/arm: Implement MVE VMLAS
Date: Sat, 17 Jul 2021 13:40:45 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0

On 7/17/21 3:06 AM, Peter Maydell wrote:
On Fri, 16 Jul 2021 at 23:12, Richard Henderson
<richard.henderson@linaro.org> wrote:

On 7/13/21 6:37 AM, Peter Maydell wrote:
Implement the MVE VMLAS insn, which multiplies a vector by a vector
and adds a scalar.

Signed-off-by: Peter Maydell<peter.maydell@linaro.org>
   target/arm/helper-mve.h    |  8 ++++++++
   target/arm/mve.decode      |  3 +++
   target/arm/mve_helper.c    | 31 +++++++++++++++++++++++++++++++
   target/arm/translate-mve.c |  2 ++
   4 files changed, 44 insertions(+)

+/* Vector by vector plus scalar */
+#define DO_VMLAS(D, N, M) ((N) * (D) + (M))

This is confusing.  The ARM says

# Operations that do not perform
# widening are always unsigned (encoded with U=1),

I have noticed that that text often appears for insns where it doesn't
really apply. I mostly ignore the text in favour of looking at
the pseudocode for working out what is supposed to be done.

Yes, but in this case there's nothing about the pseudocode that suggests that sign matters at all. Neither the multiply nor the addition are widening. So is there really a signed VMLAS instruction?


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