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[PATCH for-6.1 v6 11/17] hw/core: Introduce CPUClass.gdb_adjust_breakpoi
From: |
Richard Henderson |
Subject: |
[PATCH for-6.1 v6 11/17] hw/core: Introduce CPUClass.gdb_adjust_breakpoint |
Date: |
Tue, 20 Jul 2021 09:54:33 -1000 |
This will allow a breakpoint hack to move out of AVR's translator.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/hw/core/cpu.h | 4 ++++
cpu.c | 10 ++++++++++
2 files changed, 14 insertions(+)
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 4e0ea68efc..bc864564ce 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -103,6 +103,9 @@ struct SysemuCPUOps;
* also implement the synchronize_from_tb hook.
* @gdb_read_register: Callback for letting GDB read a register.
* @gdb_write_register: Callback for letting GDB write a register.
+ * @gdb_adjust_breakpoint: Callback for adjusting the address of a
+ * breakpoint. Used by AVR to handle a gdb mis-feature with
+ * its Harvard architecture split code and data.
* @gdb_num_core_regs: Number of core registers accessible to GDB.
* @gdb_core_xml_file: File name for core registers GDB XML description.
* @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop
@@ -137,6 +140,7 @@ struct CPUClass {
void (*set_pc)(CPUState *cpu, vaddr value);
int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg);
int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
+ vaddr (*gdb_adjust_breakpoint)(CPUState *cpu, vaddr addr);
const char *gdb_core_xml_file;
gchar * (*gdb_arch_name)(CPUState *cpu);
diff --git a/cpu.c b/cpu.c
index 83059537d7..91d9e38acb 100644
--- a/cpu.c
+++ b/cpu.c
@@ -267,8 +267,13 @@ static void breakpoint_invalidate(CPUState *cpu,
target_ulong pc)
int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
CPUBreakpoint **breakpoint)
{
+ CPUClass *cc = CPU_GET_CLASS(cpu);
CPUBreakpoint *bp;
+ if (cc->gdb_adjust_breakpoint) {
+ pc = cc->gdb_adjust_breakpoint(cpu, pc);
+ }
+
bp = g_malloc(sizeof(*bp));
bp->pc = pc;
@@ -294,8 +299,13 @@ int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int
flags,
/* Remove a specific breakpoint. */
int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags)
{
+ CPUClass *cc = CPU_GET_CLASS(cpu);
CPUBreakpoint *bp;
+ if (cc->gdb_adjust_breakpoint) {
+ pc = cc->gdb_adjust_breakpoint(cpu, pc);
+ }
+
QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
if (bp->pc == pc && bp->flags == flags) {
cpu_breakpoint_remove_by_ref(cpu, bp);
--
2.25.1
- [PATCH for-6.1 v6 03/17] target/alpha: Drop goto_tb path in gen_call_pal, (continued)
- [PATCH for-6.1 v6 03/17] target/alpha: Drop goto_tb path in gen_call_pal, Richard Henderson, 2021/07/20
- [PATCH for-6.1 v6 05/17] accel/tcg: Drop CF_NO_GOTO_PTR from -d nochain, Richard Henderson, 2021/07/20
- [PATCH for-6.1 v6 10/17] target/i386: Implement debug_check_breakpoint, Richard Henderson, 2021/07/20
- [PATCH for-6.1 v6 04/17] accel/tcg: Add CF_NO_GOTO_TB and CF_NO_GOTO_PTR, Richard Henderson, 2021/07/20
- [PATCH for-6.1 v6 06/17] accel/tcg: Handle -singlestep in curr_cflags, Richard Henderson, 2021/07/20
- [PATCH for-6.1 v6 07/17] accel/tcg: Use CF_NO_GOTO_{TB, PTR} in cpu_exec_step_atomic, Richard Henderson, 2021/07/20
- [PATCH for-6.1 v6 08/17] hw/core: Introduce TCGCPUOps.debug_check_breakpoint, Richard Henderson, 2021/07/20
- [PATCH for-6.1 v6 09/17] target/arm: Implement debug_check_breakpoint, Richard Henderson, 2021/07/20
- [PATCH for-6.1 v6 11/17] hw/core: Introduce CPUClass.gdb_adjust_breakpoint,
Richard Henderson <=
[PATCH for-6.1 v6 13/17] accel/tcg: Merge tb_find into its only caller, Richard Henderson, 2021/07/20
[PATCH for-6.1 v6 16/17] accel/tcg: Hoist tb_cflags to a local in translator_loop, Richard Henderson, 2021/07/20
[PATCH for-6.1 v6 17/17] accel/tcg: Record singlestep_enabled in tb->cflags, Richard Henderson, 2021/07/20