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[PULL 11/27] accel/tcg: Reduce CF_COUNT_MASK to match TCG_MAX_INSNS
From: |
Richard Henderson |
Subject: |
[PULL 11/27] accel/tcg: Reduce CF_COUNT_MASK to match TCG_MAX_INSNS |
Date: |
Wed, 21 Jul 2021 09:59:38 -1000 |
The space reserved for CF_COUNT_MASK was overly large.
Reduce to free up cflags bits and eliminate an extra test.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20210717221851.2124573-2-richard.henderson@linaro.org>
---
include/exec/exec-all.h | 4 +++-
accel/tcg/translate-all.c | 5 ++---
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 754f4130c9..dfe82ed19c 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -492,7 +492,9 @@ struct TranslationBlock {
target_ulong cs_base; /* CS base for this block */
uint32_t flags; /* flags defining in which context the code was generated
*/
uint32_t cflags; /* compile flags */
-#define CF_COUNT_MASK 0x00007fff
+
+/* Note that TCG_MAX_INSNS is 512; we validate this match elsewhere. */
+#define CF_COUNT_MASK 0x000001ff
#define CF_LAST_IO 0x00008000 /* Last insn may be an IO access. */
#define CF_MEMI_ONLY 0x00010000 /* Only instrument memory ops */
#define CF_USE_ICOUNT 0x00020000
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 4df26de858..5cc01d693b 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -1428,11 +1428,10 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
max_insns = cflags & CF_COUNT_MASK;
if (max_insns == 0) {
- max_insns = CF_COUNT_MASK;
- }
- if (max_insns > TCG_MAX_INSNS) {
max_insns = TCG_MAX_INSNS;
}
+ QEMU_BUILD_BUG_ON(CF_COUNT_MASK + 1 != TCG_MAX_INSNS);
+
if (cpu->singlestep_enabled || singlestep) {
max_insns = 1;
}
--
2.25.1
- [PULL 02/27] qemu/atomic: Remove pre-C11 atomic fallbacks, (continued)
- [PULL 02/27] qemu/atomic: Remove pre-C11 atomic fallbacks, Richard Henderson, 2021/07/21
- [PULL 01/27] qemu/atomic: Use macros for CONFIG_ATOMIC64, Richard Henderson, 2021/07/21
- [PULL 03/27] qemu/atomic: Add aligned_{int64,uint64}_t types, Richard Henderson, 2021/07/21
- [PULL 04/27] tcg: Rename helper_atomic_*_mmu and provide for user-only, Richard Henderson, 2021/07/21
- [PULL 05/27] accel/tcg: Standardize atomic helpers on softmmu api, Richard Henderson, 2021/07/21
- [PULL 06/27] accel/tcg: Fold EXTRA_ARGS into atomic_template.h, Richard Henderson, 2021/07/21
- [PULL 07/27] accel/tcg: Remove ATOMIC_MMU_DECLS, Richard Henderson, 2021/07/21
- [PULL 08/27] accel/tcg: Expand ATOMIC_MMU_LOOKUP_*, Richard Henderson, 2021/07/21
- [PULL 09/27] trace: Fold mem-internal.h into mem.h, Richard Henderson, 2021/07/21
- [PULL 10/27] accel/tcg: Push trace info building into atomic_common.c.inc, Richard Henderson, 2021/07/21
- [PULL 11/27] accel/tcg: Reduce CF_COUNT_MASK to match TCG_MAX_INSNS,
Richard Henderson <=
- [PULL 12/27] accel/tcg: Move curr_cflags into cpu-exec.c, Richard Henderson, 2021/07/21
- [PULL 13/27] target/alpha: Drop goto_tb path in gen_call_pal, Richard Henderson, 2021/07/21
- [PULL 14/27] accel/tcg: Add CF_NO_GOTO_TB and CF_NO_GOTO_PTR, Richard Henderson, 2021/07/21
- [PULL 20/27] target/i386: Implement debug_check_breakpoint, Richard Henderson, 2021/07/21
- [PULL 17/27] accel/tcg: Use CF_NO_GOTO_{TB, PTR} in cpu_exec_step_atomic, Richard Henderson, 2021/07/21
- [PULL 26/27] accel/tcg: Hoist tb_cflags to a local in translator_loop, Richard Henderson, 2021/07/21
- [PULL 22/27] target/avr: Implement gdb_adjust_breakpoint, Richard Henderson, 2021/07/21
- [PULL 19/27] target/arm: Implement debug_check_breakpoint, Richard Henderson, 2021/07/21
- [PULL 21/27] hw/core: Introduce CPUClass.gdb_adjust_breakpoint, Richard Henderson, 2021/07/21
- [PULL 24/27] accel/tcg: Move breakpoint recognition outside translation, Richard Henderson, 2021/07/21