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Re: [PATCH v2 17/22] target/loongarch: Add floating point load/store ins


From: Richard Henderson
Subject: Re: [PATCH v2 17/22] target/loongarch: Add floating point load/store instruction translation
Date: Thu, 22 Jul 2021 20:34:10 -1000
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0

On 7/20/21 11:53 PM, Song Gao wrote:
+static bool trans_fldx_d(DisasContext *ctx, arg_fldx_d *a)
+{
+    TCGv t0;
+    TCGv_i64 fp0;
+    TCGv Rj = cpu_gpr[a->rj];
+    TCGv Rk = cpu_gpr[a->rk];
+
+    t0 = tcg_temp_new();
+    fp0 = tcg_temp_new_i64();
+
+    if (a->rj == 0 && a->rk == 0) {
+        /* Nop */
+        return true;
+    }

This is not true.  This is simply a read from address 0 + 0 = 0.
Similarly for all of the other indexed memory operations.

And again, you should be using helpers to reduce the replication here.


r~



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