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Re: [PATCH v6 1/5] hw/nvme: split pmrmsc register into upper and lower
From: |
Klaus Jensen |
Subject: |
Re: [PATCH v6 1/5] hw/nvme: split pmrmsc register into upper and lower |
Date: |
Mon, 26 Jul 2021 17:22:46 +0200 |
Keith, Appala, any chance one of you could review this? This really
needs to get to an -rc sooner rather than later :)
On Jul 21 09:48, Klaus Jensen wrote:
> From: Klaus Jensen <k.jensen@samsung.com>
>
> The specification uses a set of 32 bit PMRMSCL and PMRMSCU registers to
> make up the 64 bit logical PMRMSC register.
>
> Make it so.
>
> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
> ---
> include/block/nvme.h | 31 ++++++++++++++++---------------
> hw/nvme/ctrl.c | 10 ++++++----
> 2 files changed, 22 insertions(+), 19 deletions(-)
>
> diff --git a/include/block/nvme.h b/include/block/nvme.h
> index 527105fafc0b..84053b68b987 100644
> --- a/include/block/nvme.h
> +++ b/include/block/nvme.h
> @@ -26,7 +26,8 @@ typedef struct QEMU_PACKED NvmeBar {
> uint32_t pmrsts;
> uint32_t pmrebs;
> uint32_t pmrswtp;
> - uint64_t pmrmsc;
> + uint32_t pmrmscl;
> + uint32_t pmrmscu;
> uint8_t css[484];
> } NvmeBar;
>
> @@ -475,25 +476,25 @@ enum NvmePmrswtpMask {
> #define NVME_PMRSWTP_SET_PMRSWTV(pmrswtp, val) \
> (pmrswtp |= (uint64_t)(val & PMRSWTP_PMRSWTV_MASK) <<
> PMRSWTP_PMRSWTV_SHIFT)
>
> -enum NvmePmrmscShift {
> - PMRMSC_CMSE_SHIFT = 1,
> - PMRMSC_CBA_SHIFT = 12,
> +enum NvmePmrmsclShift {
> + PMRMSCL_CMSE_SHIFT = 1,
> + PMRMSCL_CBA_SHIFT = 12,
> };
>
> -enum NvmePmrmscMask {
> - PMRMSC_CMSE_MASK = 0x1,
> - PMRMSC_CBA_MASK = 0xfffffffffffff,
> +enum NvmePmrmsclMask {
> + PMRMSCL_CMSE_MASK = 0x1,
> + PMRMSCL_CBA_MASK = 0xfffff,
> };
>
> -#define NVME_PMRMSC_CMSE(pmrmsc) \
> - ((pmrmsc >> PMRMSC_CMSE_SHIFT) & PMRMSC_CMSE_MASK)
> -#define NVME_PMRMSC_CBA(pmrmsc) \
> - ((pmrmsc >> PMRMSC_CBA_SHIFT) & PMRMSC_CBA_MASK)
> +#define NVME_PMRMSCL_CMSE(pmrmscl) \
> + ((pmrmscl >> PMRMSCL_CMSE_SHIFT) & PMRMSCL_CMSE_MASK)
> +#define NVME_PMRMSCL_CBA(pmrmscl) \
> + ((pmrmscl >> PMRMSCL_CBA_SHIFT) & PMRMSCL_CBA_MASK)
>
> -#define NVME_PMRMSC_SET_CMSE(pmrmsc, val) \
> - (pmrmsc |= (uint64_t)(val & PMRMSC_CMSE_MASK) << PMRMSC_CMSE_SHIFT)
> -#define NVME_PMRMSC_SET_CBA(pmrmsc, val) \
> - (pmrmsc |= (uint64_t)(val & PMRMSC_CBA_MASK) << PMRMSC_CBA_SHIFT)
> +#define NVME_PMRMSCL_SET_CMSE(pmrmscl, val) \
> + (pmrmscl |= (uint32_t)(val & PMRMSCL_CMSE_MASK) << PMRMSCL_CMSE_SHIFT)
> +#define NVME_PMRMSCL_SET_CBA(pmrmscl, val) \
> + (pmrmscl |= (uint32_t)(val & PMRMSCL_CBA_MASK) << PMRMSCL_CBA_SHIFT)
>
> enum NvmeSglDescriptorType {
> NVME_SGL_DESCR_TYPE_DATA_BLOCK = 0x0,
> diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
> index 2f0524e12a36..070d9f6a962d 100644
> --- a/hw/nvme/ctrl.c
> +++ b/hw/nvme/ctrl.c
> @@ -5916,11 +5916,13 @@ static void nvme_write_bar(NvmeCtrl *n, hwaddr
> offset, uint64_t data,
> return;
> }
>
> - n->bar.pmrmsc = (n->bar.pmrmsc & ~0xffffffff) | (data & 0xffffffff);
> + n->bar.pmrmscl = data;
> n->pmr.cmse = false;
>
> - if (NVME_PMRMSC_CMSE(n->bar.pmrmsc)) {
> - hwaddr cba = NVME_PMRMSC_CBA(n->bar.pmrmsc) << PMRMSC_CBA_SHIFT;
> + if (NVME_PMRMSCL_CMSE(n->bar.pmrmscl)) {
> + uint64_t pmrmscu = n->bar.pmrmscu;
> + hwaddr cba = (pmrmscu << 32) |
> + (NVME_PMRMSCL_CBA(n->bar.pmrmscl) << PMRMSCL_CBA_SHIFT);
> if (cba + int128_get64(n->pmr.dev->mr.size) < cba) {
> NVME_PMRSTS_SET_CBAI(n->bar.pmrsts, 1);
> return;
> @@ -5936,7 +5938,7 @@ static void nvme_write_bar(NvmeCtrl *n, hwaddr offset,
> uint64_t data,
> return;
> }
>
> - n->bar.pmrmsc = (n->bar.pmrmsc & 0xffffffff) | (data << 32);
> + n->bar.pmrmscu = data;
> return;
> default:
> NVME_GUEST_ERR(pci_nvme_ub_mmiowr_invalid,
> --
> 2.32.0
>
--
One of us - No more doubt, silence or taboo about mental illness.
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- [PATCH v6 0/5] hw/nvme: fix mmio read, Klaus Jensen, 2021/07/21
- [PATCH v6 1/5] hw/nvme: split pmrmsc register into upper and lower, Klaus Jensen, 2021/07/21
- [PATCH v6 2/5] hw/nvme: use symbolic names for registers, Klaus Jensen, 2021/07/21
- [PATCH v6 3/5] hw/nvme: fix out-of-bounds reads, Klaus Jensen, 2021/07/21
- [PATCH v6 5/5] tests/qtest/nvme-test: add mmio read test, Klaus Jensen, 2021/07/21
- [PATCH v6 4/5] hw/nvme: fix mmio read, Klaus Jensen, 2021/07/21