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[PULL 14/14] hw: aspeed_gpio: Fix memory size
From: |
Peter Maydell |
Subject: |
[PULL 14/14] hw: aspeed_gpio: Fix memory size |
Date: |
Tue, 27 Jul 2021 11:48:01 +0100 |
From: Joel Stanley <joel@jms.id.au>
The macro used to calculate the maximum memory size of the MMIO region
had a mistake, causing all GPIO models to create a mapping of 0x9D8.
The intent was to have it be 0x9D8 - 0x800.
This extra size doesn't matter on ast2400 and ast2500, which have a 4KB
region set aside for the GPIO controller.
On the ast2600 the 3.3V and 1.8V GPIO controllers are 2KB apart, so the
regions would overlap. Worse was the 1.8V controller would map over the
top of the following peripheral, which happens to be the RTC.
The mmio region used by each device is a maximum of 2KB, so avoid the
calculations and hard code this as the maximum.
Fixes: 36d737ee82b2 ("hw/gpio: Add in AST2600 specific implementation")
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Rashmica Gupta <rashmica.g@gmail.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-id: 20210713065854.134634-2-joel@jms.id.au
[PMM: fix autocorrect error in commit message]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/gpio/aspeed_gpio.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/hw/gpio/aspeed_gpio.c b/hw/gpio/aspeed_gpio.c
index 6ae0116be70..b3dec444800 100644
--- a/hw/gpio/aspeed_gpio.c
+++ b/hw/gpio/aspeed_gpio.c
@@ -207,7 +207,6 @@
#define GPIO_1_8V_MEM_SIZE 0x9D8
#define GPIO_1_8V_REG_ARRAY_SIZE ((GPIO_1_8V_MEM_SIZE - \
GPIO_1_8V_REG_OFFSET) >> 2)
-#define GPIO_MAX_MEM_SIZE MAX(GPIO_3_6V_MEM_SIZE, GPIO_1_8V_MEM_SIZE)
static int aspeed_evaluate_irq(GPIOSets *regs, int gpio_prev_high, int gpio)
{
@@ -849,7 +848,7 @@ static void aspeed_gpio_realize(DeviceState *dev, Error
**errp)
}
memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_gpio_ops, s,
- TYPE_ASPEED_GPIO, GPIO_MAX_MEM_SIZE);
+ TYPE_ASPEED_GPIO, 0x800);
sysbus_init_mmio(sbd, &s->iomem);
}
--
2.20.1
- [PULL 02/14] qemu-options.hx: Fix formatting of -machine memory-backend option, (continued)
- [PULL 02/14] qemu-options.hx: Fix formatting of -machine memory-backend option, Peter Maydell, 2021/07/27
- [PULL 07/14] hw/intc/armv7m_nvic: Correct size of ICSR.VECTPENDING, Peter Maydell, 2021/07/27
- [PULL 06/14] hw/intc/armv7m_nvic: ISCR.ISRPENDING is set for non-enabled pending interrupts, Peter Maydell, 2021/07/27
- [PULL 05/14] target/arm: Report M-profile alignment faults correctly to the guest, Peter Maydell, 2021/07/27
- [PULL 11/14] target/arm: Export aarch64_sve_zcr_get_valid_len, Peter Maydell, 2021/07/27
- [PULL 09/14] docs: Update path that mentions deprecated.rst, Peter Maydell, 2021/07/27
- [PULL 10/14] target/arm: Correctly bound length in sve_zcr_get_valid_len, Peter Maydell, 2021/07/27
- [PULL 12/14] target/arm: Add sve-default-vector-length cpu property, Peter Maydell, 2021/07/27
- [PULL 13/14] hw/arm/nseries: Display hexadecimal value with '0x' prefix, Peter Maydell, 2021/07/27
- [PULL 08/14] hw/intc/armv7m_nvic: for v8.1M VECTPENDING hides S exceptions from NS, Peter Maydell, 2021/07/27
- [PULL 14/14] hw: aspeed_gpio: Fix memory size,
Peter Maydell <=
- Re: [PULL 00/14] target-arm queue, Peter Maydell, 2021/07/27