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Re: [PATCH for-6.2 41/53] target/arm: Implement MVE VMAXNMA and VMINNMA

From: Richard Henderson
Subject: Re: [PATCH for-6.2 41/53] target/arm: Implement MVE VMAXNMA and VMINNMA
Date: Fri, 30 Jul 2021 09:50:25 -1000
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0

On 7/29/21 1:15 AM, Peter Maydell wrote:
Implement the MVE VMAXNMA and VMINNMA insns; these are 2-operand, but
the destination register must be the same as one of the source

We defer the decode of the size in bit 28 to the individual insn
patterns rather than doing it in the format, because otherwise we
would have a single insn pattern that overlapped with two groups (eg
VMAXNMA with the VMULH_S and VMULH_U groups). Having two insn
patterns per insn seems clearer than a complex multilevel nesting
of overlapping and non-overlapping groups.

Signed-off-by: Peter Maydell<peter.maydell@linaro.org>
  target/arm/helper-mve.h    |  6 ++++++
  target/arm/mve.decode      | 11 +++++++++++
  target/arm/mve_helper.c    | 25 +++++++++++++++++++++++++
  target/arm/translate-mve.c |  2 ++
  4 files changed, 44 insertions(+)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


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