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[PATCH v2 00/55] Unaligned access for user-only
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From: |
Richard Henderson |
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Subject: |
[PATCH v2 00/55] Unaligned access for user-only |
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Date: |
Mon, 2 Aug 2021 18:13:48 -1000 |
This began with Peter wanting a cpu_ldst.h interface that can handle
alignment info for Arm M-profile system mode, which will also compile
for user-only without ifdefs. This is patch 32.
Once I had that interface, I thought I might as well enforce the
requested alignment in user-only. There are plenty of cases where
we ought to have been doing that for quite a while. This took rather
more work than I imagined to start.
So far only x86 host has been fully converted to handle unaligned
operations in user-only mode. I'll get to the others later. But
the added testcase is fairly broad, and caught lots of bugs and/or
missing code between target/ and linux-user/.
Changes for v2:
* Cleanup prctl(2), add support for prctl(PR_GET/SET_UNALIGN).
* Adjustments for ppc and sparc reporting address during alignment fault.
r~
Richard Henderson (55):
hw/core: Make do_unaligned_access noreturn
hw/core: Make do_unaligned_access available to user-only
target/alpha: Implement do_unaligned_access for user-only
target/arm: Implement do_unaligned_access for user-only
target/hppa: Implement do_unaligned_access for user-only
target/microblaze: Do not set MO_ALIGN for user-only
target/mips: Implement do_unaligned_access for user-only
target/ppc: Move SPR_DSISR setting to powerpc_excp
target/ppc: Set fault address in ppc_cpu_do_unaligned_access
target/ppc: Implement do_unaligned_access for user-only
target/riscv: Implement do_unaligned_access for user-only
target/s390x: Implement do_unaligned_access for user-only
target/sh4: Set fault address in superh_cpu_do_unaligned_access
target/sh4: Implement do_unaligned_access for user-only
target/sparc: Remove DEBUG_UNALIGNED
target/sparc: Split out build_sfsr
target/sparc: Set fault address in sparc_cpu_do_unaligned_access
target/sparc: Implement do_unaligned_access for user-only
target/xtensa: Implement do_unaligned_access for user-only
accel/tcg: Report unaligned atomics for user-only
accel/tcg: Drop signness in tracing in cputlb.c
tcg: Expand MO_SIZE to 3 bits
tcg: Rename TCGMemOpIdx to MemOpIdx
tcg: Split out MemOpIdx to exec/memopidx.h
trace/mem: Pass MemOpIdx to trace_mem_get_info
accel/tcg: Pass MemOpIdx to atomic_trace_*_post
plugins: Reorg arguments to qemu_plugin_vcpu_mem_cb
trace: Split guest_mem_before
target/arm: Use MO_128 for 16 byte atomics
target/i386: Use MO_128 for 16 byte atomics
target/ppc: Use MO_128 for 16 byte atomics
target/s390x: Use MO_128 for 16 byte atomics
target/hexagon: Implement cpu_mmu_index
accel/tcg: Add cpu_{ld,st}*_mmu interfaces
accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h
target/mips: Use cpu_*_data_ra for msa load/store
target/mips: Use 8-byte memory ops for msa load/store
target/s390x: Use cpu_*_mmu instead of helper_*_mmu
target/sparc: Use cpu_*_mmu instead of helper_*_mmu
target/arm: Use cpu_*_mmu instead of helper_*_mmu
tcg: Move helper_*_mmu decls to tcg/tcg-ldst.h
tcg: Add helper_unaligned_mmu for user-only sigbus
tcg/i386: Support raising sigbus for user-only
tests/tcg/multiarch: Add sigbus.c
linux-user: Split out do_prctl and subroutines
linux-user: Disable more prctl subcodes
hw/core/cpu: Re-sort the non-pointers to the end of CPUClass
linux-user: Add code for PR_GET/SET_UNALIGN
hw/core/cpu: Move cpu properties to cpu-sysemu.c
hw/core/cpu: Add prctl-unalign-sigbus property for user-only
target/alpha: Reorg fp memory operations
target/alpha: Reorg integer memory operations
target/alpha: Implement prctl_unalign_sigbus
target/hppa: Implement prctl_unalign_sigbus
target/sh4: Implement prctl_unalign_sigbus
docs/devel/loads-stores.rst | 52 +-
accel/tcg/atomic_template.h | 73 ++-
accel/tcg/internal.h | 4 +
hw/core/cpu-common.h | 17 +
include/exec/cpu_ldst.h | 332 ++++++-------
include/exec/memop.h | 14 +-
include/exec/memopidx.h | 55 +++
include/hw/core/cpu.h | 14 +-
include/hw/core/tcg-cpu-ops.h | 15 +-
include/qemu/plugin.h | 26 +-
include/tcg/tcg-ldst.h | 79 ++++
include/tcg/tcg.h | 197 +-------
linux-user/aarch64/target_syscall.h | 23 -
linux-user/mips/target_syscall.h | 6 -
linux-user/mips64/target_syscall.h | 6 -
target/alpha/cpu.h | 9 +-
target/arm/internals.h | 3 +-
target/hexagon/cpu.h | 9 +
target/hppa/cpu.h | 5 +-
target/microblaze/cpu.h | 2 +-
target/mips/tcg/tcg-internal.h | 4 +-
target/nios2/cpu.h | 4 +-
target/ppc/internal.h | 4 +-
target/riscv/cpu.h | 2 +-
target/s390x/s390x-internal.h | 4 +-
target/sh4/cpu.h | 8 +-
target/xtensa/cpu.h | 4 +-
tcg/i386/tcg-target.h | 2 -
trace/mem.h | 63 ---
accel/tcg/cpu-exec-common.c | 12 +
accel/tcg/cputlb.c | 495 +++++++------------
accel/tcg/plugin-gen.c | 5 +-
accel/tcg/user-exec.c | 435 +++++++----------
hw/core/cpu-common.c | 18 +-
hw/core/cpu-sysemu.c | 24 +
hw/core/cpu-user.c | 37 ++
linux-user/aarch64/cpu_loop.c | 4 +
linux-user/arm/cpu_loop.c | 43 +-
linux-user/hppa/cpu_loop.c | 2 +-
linux-user/mips/cpu_loop.c | 20 +-
linux-user/ppc/cpu_loop.c | 2 +-
linux-user/riscv/cpu_loop.c | 7 +
linux-user/sh4/cpu_loop.c | 8 +
linux-user/sparc/cpu_loop.c | 11 +
linux-user/syscall.c | 709 +++++++++++++++++-----------
plugins/api.c | 19 +-
plugins/core.c | 10 +-
target/alpha/cpu.c | 2 +-
target/alpha/mem_helper.c | 8 +-
target/alpha/translate.c | 188 ++++----
target/arm/cpu.c | 2 +-
target/arm/cpu_tcg.c | 2 +-
target/arm/helper-a64.c | 77 +--
target/arm/m_helper.c | 8 +-
target/arm/translate-a64.c | 2 +-
target/hppa/cpu.c | 16 +-
target/hppa/translate.c | 19 +-
target/i386/tcg/mem_helper.c | 4 +-
target/m68k/op_helper.c | 3 +-
target/microblaze/translate.c | 16 +
target/mips/cpu.c | 2 +-
target/mips/tcg/msa_helper.c | 395 ++++------------
target/mips/tcg/op_helper.c | 3 +-
target/mips/tcg/user/tlb_helper.c | 23 +-
target/ppc/cpu_init.c | 2 +-
target/ppc/excp_helper.c | 35 +-
target/ppc/mem_helper.c | 1 -
target/ppc/translate.c | 12 +-
target/riscv/cpu.c | 2 +-
target/riscv/cpu_helper.c | 8 +-
target/s390x/cpu.c | 2 +-
target/s390x/tcg/excp_helper.c | 28 +-
target/s390x/tcg/mem_helper.c | 31 +-
target/sh4/cpu.c | 2 +-
target/sh4/op_helper.c | 8 +-
target/sh4/translate.c | 50 +-
target/sparc/cpu.c | 2 +-
target/sparc/ldst_helper.c | 38 +-
target/sparc/mmu_helper.c | 92 +++-
target/xtensa/cpu.c | 2 +-
target/xtensa/helper.c | 30 +-
tcg/optimize.c | 2 +-
tcg/tcg-op.c | 60 +--
tcg/tcg.c | 3 +-
tcg/tci.c | 15 +-
tests/tcg/multiarch/sigbus.c | 68 +++
accel/tcg/atomic_common.c.inc | 43 +-
accel/tcg/ldst_common.c.inc | 307 ++++++++++++
target/s390x/tcg/translate_vx.c.inc | 2 +-
tcg/aarch64/tcg-target.c.inc | 18 +-
tcg/arm/tcg-target.c.inc | 14 +-
tcg/i386/tcg-target.c.inc | 128 ++++-
tcg/mips/tcg-target.c.inc | 16 +-
tcg/ppc/tcg-target.c.inc | 18 +-
tcg/riscv/tcg-target.c.inc | 20 +-
tcg/s390/tcg-target.c.inc | 14 +-
tcg/sparc/tcg-target.c.inc | 20 +-
tcg/tcg-ldst.c.inc | 2 +-
hw/core/meson.build | 4 +
trace-events | 18 +-
100 files changed, 2549 insertions(+), 2235 deletions(-)
create mode 100644 hw/core/cpu-common.h
create mode 100644 include/exec/memopidx.h
create mode 100644 include/tcg/tcg-ldst.h
delete mode 100644 trace/mem.h
create mode 100644 hw/core/cpu-user.c
create mode 100644 tests/tcg/multiarch/sigbus.c
create mode 100644 accel/tcg/ldst_common.c.inc
--
2.25.1
- [PATCH v2 00/55] Unaligned access for user-only,
Richard Henderson <=