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[PATCH V6 21/27] vfio-pci: cpr part 3 (intx)
From: |
Steve Sistare |
Subject: |
[PATCH V6 21/27] vfio-pci: cpr part 3 (intx) |
Date: |
Fri, 6 Aug 2021 14:43:55 -0700 |
Preserve vfio INTX state across cpr restart. Preserve VFIOINTx fields as
follows:
pin : Recover this from the vfio config in kernel space
interrupt : Preserve its eventfd descriptor across exec.
unmask : Ditto
route.irq : This could perhaps be recovered in vfio_pci_post_load by
calling pci_device_route_intx_to_irq(pin), whose implementation reads
config space for a bridge device such as ich9. However, there is no
guarantee that the bridge vmstate is read before vfio vmstate. Rather
than fiddling with MigrationPriority for vmstate handlers, explicitly
save route.irq in vfio vmstate.
pending : save in vfio vmstate.
mmap_timeout, mmap_timer : Re-initialize
bool kvm_accel : Re-initialize
In vfio_realize, defer calling vfio_intx_enable until the vmstate
is available, in vfio_pci_post_load. Modify vfio_intx_enable and
vfio_intx_kvm_enable to skip vfio initialization, but still perform
kvm initialization.
Signed-off-by: Steve Sistare <steven.sistare@oracle.com>
---
hw/vfio/pci.c | 94 ++++++++++++++++++++++++++++++++++++++++++++++++++++-------
1 file changed, 83 insertions(+), 11 deletions(-)
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index 1cee52a..7e59f4f 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
@@ -145,14 +145,45 @@ static void vfio_intx_eoi(VFIODevice *vbasedev)
vfio_unmask_single_irqindex(vbasedev, VFIO_PCI_INTX_IRQ_INDEX);
}
+#ifdef CONFIG_KVM
+static bool vfio_no_kvm_intx(VFIOPCIDevice *vdev)
+{
+ return vdev->no_kvm_intx || !kvm_irqfds_enabled() ||
+ vdev->intx.route.mode != PCI_INTX_ENABLED ||
+ !kvm_resamplefds_enabled();
+}
+#endif
+
+static void vfio_intx_reenable_kvm(VFIOPCIDevice *vdev, Error **errp)
+{
+#ifdef CONFIG_KVM
+ if (vfio_no_kvm_intx(vdev)) {
+ return;
+ }
+
+ if (vfio_named_notifier_init(vdev, &vdev->intx.unmask, "intx-unmask", 0)) {
+ error_setg(errp, "vfio_named_notifier_init failed");
+ return;
+ }
+
+ if (kvm_irqchip_add_irqfd_notifier_gsi(kvm_state,
+ &vdev->intx.interrupt,
+ &vdev->intx.unmask,
+ vdev->intx.route.irq)) {
+ error_setg_errno(errp, errno, "failed to setup resample irqfd");
+ return;
+ }
+
+ vdev->intx.kvm_accel = true;
+#endif
+}
+
static void vfio_intx_enable_kvm(VFIOPCIDevice *vdev, Error **errp)
{
#ifdef CONFIG_KVM
int irq_fd = event_notifier_get_fd(&vdev->intx.interrupt);
- if (vdev->no_kvm_intx || !kvm_irqfds_enabled() ||
- vdev->intx.route.mode != PCI_INTX_ENABLED ||
- !kvm_resamplefds_enabled()) {
+ if (vfio_no_kvm_intx(vdev)) {
return;
}
@@ -300,7 +331,9 @@ static int vfio_intx_enable(VFIOPCIDevice *vdev, Error
**errp)
return 0;
}
- vfio_disable_interrupts(vdev);
+ if (!vdev->pdev.reused) {
+ vfio_disable_interrupts(vdev);
+ }
vdev->intx.pin = pin - 1; /* Pin A (1) -> irq[0] */
pci_config_set_interrupt_pin(vdev->pdev.config, pin);
@@ -316,7 +349,8 @@ static int vfio_intx_enable(VFIOPCIDevice *vdev, Error
**errp)
}
#endif
- ret = event_notifier_init(&vdev->intx.interrupt, 0);
+ ret = vfio_named_notifier_init(vdev, &vdev->intx.interrupt,
+ "intx-interrupt", 0);
if (ret) {
error_setg_errno(errp, -ret, "event_notifier_init failed");
return ret;
@@ -324,6 +358,11 @@ static int vfio_intx_enable(VFIOPCIDevice *vdev, Error
**errp)
fd = event_notifier_get_fd(&vdev->intx.interrupt);
qemu_set_fd_handler(fd, vfio_intx_interrupt, NULL, vdev);
+ if (vdev->pdev.reused) {
+ vfio_intx_reenable_kvm(vdev, &err);
+ goto finish;
+ }
+
if (vfio_set_irq_signaling(&vdev->vbasedev, VFIO_PCI_INTX_IRQ_INDEX, 0,
VFIO_IRQ_SET_ACTION_TRIGGER, fd, errp)) {
qemu_set_fd_handler(fd, NULL, NULL, vdev);
@@ -336,6 +375,7 @@ static int vfio_intx_enable(VFIOPCIDevice *vdev, Error
**errp)
warn_reportf_err(err, VFIO_MSG_PREFIX, vdev->vbasedev.name);
}
+finish:
vdev->interrupt = VFIO_INT_INTx;
trace_vfio_intx_enable(vdev->vbasedev.name);
@@ -3092,9 +3132,13 @@ static void vfio_realize(PCIDevice *pdev, Error **errp)
vfio_intx_routing_notifier);
vdev->irqchip_change_notifier.notify = vfio_irqchip_change;
kvm_irqchip_add_change_notifier(&vdev->irqchip_change_notifier);
- ret = vfio_intx_enable(vdev, errp);
- if (ret) {
- goto out_deregister;
+
+ /* Wait until cpr-load reads intx routing data to enable */
+ if (!pdev->reused) {
+ ret = vfio_intx_enable(vdev, errp);
+ if (ret) {
+ goto out_deregister;
+ }
}
}
@@ -3338,7 +3382,8 @@ static int vfio_pci_pre_save(void *opaque)
int i;
if (vfio_pci_read_config(pdev, PCI_INTERRUPT_PIN, 1)) {
- assert(0); /* completed in a subsequent patch */
+ save_event_fd(vdev, "intx-interrupt", 0, &vdev->intx.interrupt);
+ save_event_fd(vdev, "intx-unmask", 0, &vdev->intx.unmask);
}
for (i = 0; i < vdev->nr_vectors; i++) {
@@ -3395,6 +3440,7 @@ static int vfio_pci_post_load(void *opaque, int
version_id)
VFIOPCIDevice *vdev = opaque;
PCIDevice *pdev = &vdev->pdev;
int nr_vectors;
+ int ret = 0;
vfio_merge_config(vdev);
@@ -3409,12 +3455,37 @@ static int vfio_pci_post_load(void *opaque, int
version_id)
vfio_claim_vectors(vdev, nr_vectors, false);
} else if (vfio_pci_read_config(pdev, PCI_INTERRUPT_PIN, 1)) {
- assert(0); /* completed in a subsequent patch */
+ Error *err = 0;
+ ret = vfio_intx_enable(vdev, &err);
+ if (ret) {
+ error_report_err(err);
+ }
}
pdev->reused = false;
- return 0;
+ return ret;
+}
+
+static const VMStateDescription vfio_intx_vmstate = {
+ .name = "vfio-intx",
+ .unmigratable = 1,
+ .version_id = 0,
+ .minimum_version_id = 0,
+ .fields = (VMStateField[]) {
+ VMSTATE_BOOL(pending, VFIOINTx),
+ VMSTATE_UINT32(route.mode, VFIOINTx),
+ VMSTATE_INT32(route.irq, VFIOINTx),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+#define VMSTATE_VFIO_INTX(_field, _state) { \
+ .name = (stringify(_field)), \
+ .size = sizeof(VFIOINTx), \
+ .vmsd = &vfio_intx_vmstate, \
+ .flags = VMS_STRUCT, \
+ .offset = vmstate_offset_value(_state, _field, VFIOINTx), \
}
static bool vfio_pci_needed(void *opaque)
@@ -3433,6 +3504,7 @@ static const VMStateDescription vfio_pci_vmstate = {
.fields = (VMStateField[]) {
VMSTATE_PCI_DEVICE(pdev, VFIOPCIDevice),
VMSTATE_MSIX_TEST(pdev, VFIOPCIDevice, vfio_msix_present),
+ VMSTATE_VFIO_INTX(intx, VFIOPCIDevice),
VMSTATE_END_OF_LIST()
}
};
--
1.8.3.1
- [PATCH V6 20/27] vfio-pci: cpr part 2 (msi), (continued)
- [PATCH V6 20/27] vfio-pci: cpr part 2 (msi), Steve Sistare, 2021/08/06
- [PATCH V6 19/27] vfio-pci: cpr part 1 (fd and dma), Steve Sistare, 2021/08/06
- [PATCH V6 22/27] vhost: reset vhost devices for cpr, Steve Sistare, 2021/08/06
- [PATCH V6 23/27] chardev: cpr framework, Steve Sistare, 2021/08/06
- [PATCH V6 25/27] chardev: cpr for pty, Steve Sistare, 2021/08/06
- [PATCH V6 26/27] chardev: cpr for sockets, Steve Sistare, 2021/08/06
- [PATCH V6 27/27] cpr: only-cpr-capable option, Steve Sistare, 2021/08/06
- [PATCH V6 01/27] memory: qemu_check_ram_volatile, Steve Sistare, 2021/08/06
- [PATCH V6 21/27] vfio-pci: cpr part 3 (intx),
Steve Sistare <=
- [PATCH V6 24/27] chardev: cpr for simple devices, Steve Sistare, 2021/08/06
- Re: [PATCH V6 00/27] Live Update, Steven Sistare, 2021/08/09
- Re: [PATCH V6 00/27] Live Update, Zheng Chuan, 2021/08/21