[FSL P50x0] lscpu reports wrong values since the RC1 of kernel 5.13

[Christian Zigotzky]

Hi All,

Lscpu reports wrong values [1] since the RC1 of kernel 5.13 on my FSL 
P5040 Cyrus+ board (A-EON AmigaOne X5000). [2]
The differences are:

Since the RC1 of kernel 5.13 (wrong values):

Core(s) per socket: 1
Socket(s): 3

Before (correct values):

Core(s) per socket: 4
Socket(s): 1

Through the wrong values, I can't use "-smp 4" with a virtual e5500 QEMU 
machine with KVM HV anymore.  [3]
"-smp 3" works with KVM HV.

Maybe the file_load_64 commit from the PowerPC updates 5.13-2 is the 
problem ( powerpc/kexec_file: Use current CPU info while setting up 
FDT). [4]

Or maybe this change (PowerPC updates 5.13-1):

-#ifdef CONFIG_PPC_BOOK3E_64
-    state->ctx_state = exception_enter();
-    if (user_mode(regs))
-        account_cpu_user_entry();
-#endif

---

Or maybe this change (PowerPC updates 5.13-1):

diff --git a/arch/powerpc/include/asm/smp.h b/arch/powerpc/include/asm/smp.h
index 7a13bc20f0a0c..03b3d010cbab6 100644
--- a/arch/powerpc/include/asm/smp.h
+++ b/arch/powerpc/include/asm/smp.h
@@ -31,6 +31,7 @@ extern u32 *cpu_to_phys_id;
 extern bool coregroup_enabled;

 extern int cpu_to_chip_id(int cpu);
+extern int *chip_id_lookup_table;

 #ifdef CONFIG_SMP

@@ -121,6 +122,11 @@ static inline struct cpumask *cpu_sibling_mask(int cpu)
     return per_cpu(cpu_sibling_map, cpu);
 }

+static inline struct cpumask *cpu_core_mask(int cpu)
+{
+    return per_cpu(cpu_core_map, cpu);
+}
+
 static inline struct cpumask *cpu_l2_cache_mask(int cpu)
 {
     return per_cpu(cpu_l2_cache_map, cpu);

---

I have found a lot of other changes in the PowerPC updates 5.13-1 
regarding the CPU.

Could you please check the CPU changes in the PowerPC updates 5.13-1 and 
5.13-2?

Please find attached the kernel 5.14-rc5 config.

Thanks,
Christian


[1]

lscpu with the correct values before the RC1 of kernel 5.13:

Architecture: ppc64
CPU op-mode(s): 32-bit, 64-bit
Byte Order: Big Endian
CPU(s): 4
On-line CPU(s) list: 0-3
Thread(s) per core: 1
Core(s) per socket: 4
Socket(s): 1
Model: 1.2 (pvr 8024 0012)
Model name: e5500
L1d cache: 128 KiB
L1i cache: 128 KiB
L2 cache: 2 MiB
L3 cache: 2 MiB
Vulnerability Itlb multihit: Not affected
Vulnerability L1tf: Not affected
Vulnerability Mds: Not affected
Vulnerability Meltdown: Not affected
Vulnerability Spec store bypass: Not affected
Vulnerability Spectre v1: Mitigation; __user pointer sanitization
Vulnerability Spectre v2: Mitigation; Branch predictor state flush
Vulnerability Srbds: Not affected
Vulnerability Tsx async abort: Not affected

---

lscpu with the wrong values since the RC1 of kernel 5.13:

Architecture: ppc64
CPU op-mode(s): 32-bit, 64-bit
Byte Order: Big Endian
CPU(s): 4
On-line CPU(s) list: 0-3
Thread(s) per core: 1
Core(s) per socket: 1
Socket(s): 3
Model: 1.2 (pvr 8024 0012)
Model name: e5500
L1d cache: 128 KiB
L1i cache: 128 KiB
L2 cache: 2 MiB
L3 cache: 2 MiB
Vulnerability Itlb multihit: Not affected
Vulnerability L1tf: Not affected
Vulnerability Mds: Not affected
Vulnerability Meltdown: Not affected
Vulnerability Spec store bypass: Not affected
Vulnerability Spectre v1: Mitigation; __user pointer sanitization
Vulnerability Spectre v2: Mitigation; Branch predictor state flush
Vulnerability Srbds: Not affected
Vulnerability Tsx async abort: Not affected

---

[2] http://wiki.amiga.org/index.php?title=X5000

[3] https://lists.ozlabs.org/pipermail/linuxppc-dev/2021-May/229103.html

[4] 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/diff/arch/powerpc/kexec/file_load_64.c?id=ab159ac569fddf812c0a217d6dbffaa5d93ef88f

cyrus-5.14-rc5.config
Description: Text document