Re: [PATCH 4/6] target/mips: Convert Loongson [D]DIVU.G opcodes to decodetree

[Philippe Mathieu-Daudé]

On 1/21/21 8:58 PM, Richard Henderson wrote:
> On 1/12/21 11:55 AM, Philippe Mathieu-Daudé wrote:
>> Convert DIVU.G (divide 32-bit unsigned integers) and DDIVU.G
>> (divide 64-bit unsigned integers) opcodes to decodetree.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>>  target/mips/godson2.decode    |  2 ++
>>  target/mips/loong-ext.decode  |  2 ++
>>  target/mips/loong_translate.c | 55 +++++++++++++++++++++++++++++++++++
>>  target/mips/translate.c       | 37 -----------------------
>>  4 files changed, 59 insertions(+), 37 deletions(-)

>> +static bool gen_lext_DIVU_G(DisasContext *s, int rd, int rs, int rt,
>> +                            bool is_double)
>> +{
>> +    TCGv t0, t1;
>> +    TCGLabel *l1, *l2;
>> +
>> +    if (is_double) {
>> +        if (TARGET_LONG_BITS != 64) {
>> +            return false;
>> +        }
>> +        check_mips_64(s);
>> +    }
>> +
>> +    if (rd == 0) {
>> +        /* Treat as NOP. */
>> +        return true;
>> +    }
>> +
>> +    t0 = tcg_temp_local_new();
>> +    t1 = tcg_temp_local_new();
>> +    l1 = gen_new_label();
>> +    l2 = gen_new_label();
>> +
>> +    gen_load_gpr(t0, rs);
>> +    gen_load_gpr(t1, rt);
>> +
>> +    if (!is_double) {
>> +        tcg_gen_ext32u_tl(t0, t0);
>> +        tcg_gen_ext32u_tl(t1, t1);
>> +    }
>> +    tcg_gen_brcondi_tl(TCG_COND_NE, t1, 0, l1);
>> +    tcg_gen_movi_tl(cpu_gpr[rd], 0);
>> +
>> +    tcg_gen_br(l2);
>> +    gen_set_label(l1);
>> +    tcg_gen_divu_tl(cpu_gpr[rd], t0, t1);
>> +    tcg_gen_ext32s_tl(cpu_gpr[rd], cpu_gpr[rd]);
> 
> this extend should be conditional on !is_double.

Oops, thanks!

> 
> Otherwise,
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> 
> r~
>