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[PATCH v3 09/66] target/ppc: Move SPR_DSISR setting to powerpc_excp
From: |
Richard Henderson |
Subject: |
[PATCH v3 09/66] target/ppc: Move SPR_DSISR setting to powerpc_excp |
Date: |
Wed, 18 Aug 2021 09:18:23 -1000 |
By doing this while sending the exception, we will have already
done the unwinding, which makes the ppc_cpu_do_unaligned_access
code a bit cleaner.
Update the comment about the expected instruction format.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/ppc/excp_helper.c | 21 +++++++++------------
1 file changed, 9 insertions(+), 12 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index a79a0ed465..0df358f93f 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -478,13 +478,15 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int
excp_model, int excp)
break;
}
case POWERPC_EXCP_ALIGN: /* Alignment exception */
- /* Get rS/rD and rA from faulting opcode */
/*
- * Note: the opcode fields will not be set properly for a
- * direct store load/store, but nobody cares as nobody
- * actually uses direct store segments.
+ * Get rS/rD and rA from faulting opcode.
+ * Note: We will only invoke ALIGN for atomic operations,
+ * so all instructions are X-form.
*/
- env->spr[SPR_DSISR] |= (env->error_code & 0x03FF0000) >> 16;
+ {
+ uint32_t insn = cpu_ldl_code(env, env->nip);
+ env->spr[SPR_DSISR] |= (insn & 0x03FF0000) >> 16;
+ }
break;
case POWERPC_EXCP_PROGRAM: /* Program exception */
switch (env->error_code & ~0xF) {
@@ -1501,14 +1503,9 @@ void ppc_cpu_do_unaligned_access(CPUState *cs, vaddr
vaddr,
int mmu_idx, uintptr_t retaddr)
{
CPUPPCState *env = cs->env_ptr;
- uint32_t insn;
-
- /* Restore state and reload the insn we executed, for filling in DSISR. */
- cpu_restore_state(cs, retaddr, true);
- insn = cpu_ldl_code(env, env->nip);
cs->exception_index = POWERPC_EXCP_ALIGN;
- env->error_code = insn & 0x03FF0000;
- cpu_loop_exit(cs);
+ env->error_code = 0;
+ cpu_loop_exit_restore(cs, retaddr);
}
#endif
--
2.25.1
- [PATCH v3 00/66] Unaligned access for user-only, Richard Henderson, 2021/08/18
- [PATCH v3 01/66] util: Suppress -Wstringop-overflow in qemu_thread_start, Richard Henderson, 2021/08/18
- [PATCH v3 02/66] hw/core: Make do_unaligned_access noreturn, Richard Henderson, 2021/08/18
- [PATCH v3 03/66] hw/core: Make do_unaligned_access available to user-only, Richard Henderson, 2021/08/18
- [PATCH v3 04/66] target/alpha: Implement do_unaligned_access for user-only, Richard Henderson, 2021/08/18
- [PATCH v3 05/66] target/arm: Implement do_unaligned_access for user-only, Richard Henderson, 2021/08/18
- [PATCH v3 06/66] target/hppa: Implement do_unaligned_access for user-only, Richard Henderson, 2021/08/18
- [PATCH v3 09/66] target/ppc: Move SPR_DSISR setting to powerpc_excp,
Richard Henderson <=
- [PATCH v3 10/66] target/ppc: Set fault address in ppc_cpu_do_unaligned_access, Richard Henderson, 2021/08/18
- [PATCH v3 11/66] target/ppc: Implement do_unaligned_access for user-only, Richard Henderson, 2021/08/18
- [PATCH v3 07/66] target/microblaze: Do not set MO_ALIGN for user-only, Richard Henderson, 2021/08/18
- [PATCH v3 12/66] target/riscv: Implement do_unaligned_access for user-only, Richard Henderson, 2021/08/18
- [PATCH v3 14/66] target/sh4: Set fault address in superh_cpu_do_unaligned_access, Richard Henderson, 2021/08/18
- [PATCH v3 16/66] target/sparc: Remove DEBUG_UNALIGNED, Richard Henderson, 2021/08/18