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Re: [PULL 35/37] target/arm: Do hflags rebuild in cpsr_write()
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [PULL 35/37] target/arm: Do hflags rebuild in cpsr_write() |
Date: |
Thu, 26 Aug 2021 19:18:13 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 |
On 8/26/21 7:03 PM, Peter Maydell wrote:
> Currently we rely on all the callsites of cpsr_write() to rebuild the
> cached hflags if they change one of the CPSR bits which we use as a
> TB flag and cache in hflags. This is a bit awkward when we want to
> change the set of CPSR bits that we cache, because it means we need
> to re-audit all the cpsr_write() callsites to see which flags they
> are writing and whether they now need to rebuild the hflags.
>
> Switch instead to making cpsr_write() call arm_rebuild_hflags()
> itself if one of the bits being changed is a cached bit.
>
> We don't do the rebuild for the CPSRWriteRaw write type, because that
> kind of write is generally doing something special anyway. For the
> CPSRWriteRaw callsites in the KVM code and inbound migration we
> definitely don't want to recalculate the hflags; the callsites in
> boot.c and arm-powerctl.c have to do a rebuild-hflags call themselves
> anyway because of other CPU state changes they make.
>
> This allows us to drop explicit arm_rebuild_hflags() calls in a
> couple of places where the only reason we needed to call it was the
> CPSR write.
Just noticing this patch, nice.
> This fixes a bug where we were incorrectly failing to rebuild hflags
> in the code path for a gdbstub write to CPSR, which meant that you
> could make QEMU assert by breaking into a running guest, altering the
> CPSR to change the value of, for example, CPSR.E, and then
> continuing.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> Message-id: 20210817201843.3829-1-peter.maydell@linaro.org
> ---
> target/arm/cpu.h | 10 ++++++++--
> linux-user/arm/signal.c | 2 --
> target/arm/helper.c | 5 +++++
> 3 files changed, 13 insertions(+), 4 deletions(-)
- [PULL 26/37] net: Zero sockaddr_in in parse_host_port(), (continued)
- [PULL 26/37] net: Zero sockaddr_in in parse_host_port(), Peter Maydell, 2021/08/26
- [PULL 30/37] raspi: Use error_fatal for SoC realize errors, not error_abort, Peter Maydell, 2021/08/26
- [PULL 28/37] tests/qtest/ipmi-bt-test: Zero-initialize sockaddr struct, Peter Maydell, 2021/08/26
- [PULL 32/37] hw/arm/virt: Delete EL3 error checksnow provided in CPU realize, Peter Maydell, 2021/08/26
- [PULL 27/37] gdbstub: Zero-initialize sockaddr structs, Peter Maydell, 2021/08/26
- [PULL 29/37] tests/tcg/multiarch/linux-test: Zero-initialize sockaddr structs, Peter Maydell, 2021/08/26
- [PULL 25/37] softmmu/physmem.c: Check return value from realpath(), Peter Maydell, 2021/08/26
- [PULL 33/37] target/arm: Implement HSTR.TTEE, Peter Maydell, 2021/08/26
- [PULL 36/37] hw/arm/xlnx-versal: Add unimplemented APU mmio, Peter Maydell, 2021/08/26
- [PULL 35/37] target/arm: Do hflags rebuild in cpsr_write(), Peter Maydell, 2021/08/26
- Re: [PULL 35/37] target/arm: Do hflags rebuild in cpsr_write(),
Philippe Mathieu-Daudé <=
- [PULL 31/37] target/arm: Avoid assertion trying to use KVM and multiple ASes, Peter Maydell, 2021/08/26
- [PULL 37/37] hw/arm/xlnx-zynqmp: Add unimplemented APU mmio, Peter Maydell, 2021/08/26
- [PULL 34/37] target/arm: Implement HSTR.TJDBX, Peter Maydell, 2021/08/26
- Re: [PULL 00/37] target-arm queue, Peter Maydell, 2021/08/26