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Re: [PATCH v3 5/9] escc: implement soft reset as described in the datash
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From: |
Peter Maydell |
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Subject: |
Re: [PATCH v3 5/9] escc: implement soft reset as described in the datasheet |
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Date: |
Tue, 7 Sep 2021 14:06:53 +0100 |
On Fri, 3 Sept 2021 at 12:50, Mark Cave-Ayland
<mark.cave-ayland@ilande.co.uk> wrote:
>
> The software reset differs from a device reset in that it only changes the
> contents
> of specific registers. Remove the code that resets all the registers to zero
> during
> soft reset and implement the default values listed in the table in the
> "Z85C30 Reset"
> section.
>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
thanks
-- PMM
- [PATCH v3 2/9] escc: reset register values to zero in escc_reset(), (continued)
- [PATCH v3 2/9] escc: reset register values to zero in escc_reset(), Mark Cave-Ayland, 2021/09/03
- [PATCH v3 1/9] escc: checkpatch fixes, Mark Cave-Ayland, 2021/09/03
- [PATCH v3 3/9] escc: introduce escc_soft_reset_chn() for software reset, Mark Cave-Ayland, 2021/09/03
- [PATCH v3 4/9] escc: introduce escc_hard_reset_chn() for hardware reset, Mark Cave-Ayland, 2021/09/03
- [PATCH v3 6/9] escc: implement hard reset as described in the datasheet, Mark Cave-Ayland, 2021/09/03
- [PATCH v3 5/9] escc: implement soft reset as described in the datasheet, Mark Cave-Ayland, 2021/09/03
- Re: [PATCH v3 5/9] escc: implement soft reset as described in the datasheet,
Peter Maydell <=
- [PATCH v3 7/9] escc: remove register changes from escc_reset_chn(), Mark Cave-Ayland, 2021/09/03
- [PATCH v3 8/9] escc: re-use escc_reset_chn() for soft reset, Mark Cave-Ayland, 2021/09/03
- [PATCH v3 9/9] escc: fix STATUS_SYNC bit in R_STATUS register, Mark Cave-Ayland, 2021/09/03
- Re: [PATCH v3 0/9] escc: fix reset and R_STATUS when SDLC mode is enabled, Mark Cave-Ayland, 2021/09/08