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Re: [PATCH v3 0/9] escc: fix reset and R_STATUS when SDLC mode is enable


From: Mark Cave-Ayland
Subject: Re: [PATCH v3 0/9] escc: fix reset and R_STATUS when SDLC mode is enabled
Date: Wed, 8 Sep 2021 11:06:21 +0100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0

On 03/09/2021 12:32, Mark Cave-Ayland wrote:

Here are another set of ESCC fixes from my attempts to boot MacOS on the q800
machine.

Patch 1 fixes up the formatting so that the remainder of the patchset keeps
checkpatch happy.

Patches 2-8 rework the reset handling so that the QEMU device reset is separate
from the ESCC in-built hardware and software reset as defined in the datasheet.
The aim here is two-fold: allow QEMU's device reset to place the ESCC device in
a known state (although we assume all registers are zeroed whilst their values 
are
undefined according to the datasheet) and ensure that the reset commands sent by
the MacOS OpenTransport extension on boot don't re-assert the active low
STATUS_SYNC bit in R_STATUS.

Finally patch 9 is the real fix: when entering SDLC mode using an "Enter hunt"
command the STATUS_SYNC bit in R_STATUS must remain high until the flag byte
is detected. Without this fix the active low STATUS_SYNC is continually asserted
causing the MacOS OpenTransport extension to hang on startup as it believes it 
is
constantly receiving LocalTalk traffic during its initial negotiation phase.

NOTE: this patchset currently fails CI because it exposed a bug that OpenBIOS
doesn't send ESCC channel reset commands before attempting to configure and use
the serial port. Those patches have just been posted to the OpenBIOS mailing 
list
here: 
https://mail.coreboot.org/hyperkitty/list/openbios@openbios.org/thread/PQCW5RDIDIEUYBVAHNIY3OMHCEVYYWPU/.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>


v3:
- Rebase onto master
- Rework hard reset to call soft reset first as suggested by Peter
- Fix a couple of bugs in escc_soft_reset_chn()
- Add trace events for soft reset and hard reset

v2:
- Rebase onto master
- Rewrite cover letter to cover new reset changes
- Change reset to separate out QEMU device reset, soft reset and hard reset
   (ensuring register values are updated as specified in the datasheet)
- Add R-B tags from Peter

Mark Cave-Ayland (9):
   escc: checkpatch fixes
   escc: reset register values to zero in escc_reset()
   escc: introduce escc_soft_reset_chn() for software reset
   escc: introduce escc_hard_reset_chn() for hardware reset
   escc: implement soft reset as described in the datasheet
   escc: implement hard reset as described in the datasheet
   escc: remove register changes from escc_reset_chn()
   escc: re-use escc_reset_chn() for soft reset
   escc: fix STATUS_SYNC bit in R_STATUS register

  hw/char/escc.c       | 263 +++++++++++++++++++++++++++++--------------
  hw/char/trace-events |   2 +
  2 files changed, 181 insertions(+), 84 deletions(-)

Thanks for the review, Peter. I've now applied these to my qemu-sparc branch.


ATB,

Mark.



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