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Re: [PATCH v9 07/11] hvf: arm: Implement PSCI handling
From: |
Peter Maydell |
Subject: |
Re: [PATCH v9 07/11] hvf: arm: Implement PSCI handling |
Date: |
Mon, 13 Sep 2021 12:44:27 +0100 |
On Mon, 13 Sept 2021 at 12:07, Alexander Graf <agraf@csgraf.de> wrote:
>
>
> On 13.09.21 10:54, Peter Maydell wrote:
> > Something in here should be checking whether the insn the guest
> > used matches the PSCI conduit configured for the VM, ie
> > what arm_is_psci_call() does after your patch 10.
>
>
> It's yet another case where I believe we are both reading the spec
> differently :)
>
> https://documentation-service.arm.com/static/6013e5faeee5236980d08619
>
> Section 2.5.3 speaks about the conduits. It says
>
> Service calls are expected to be invoked through SMC instructions,
> except
> for Standard Hypervisor Calls and Vendor Specific Hypervisor Calls. On
> some platforms, however, SMC instructions are not available, and the
> services can be accessed through HVC instructions. The method that
> is used to invoke the service is referred to as the conduit.
>
> To me, that reads like "Use SMC whenever you can. If your hardware does
> not give you a way to handle SMC calls, falling back to HVC is ok. In
> that case, indicate that mandate to the OS".
QEMU here is being the platform, so we define what the conduit is
(or if one even exists). For the virt board this is "if the
guest has EL3 firmware, then the guest firmware is providing PSCI,
and QEMU should not; otherwise if the guest has EL2 then QEMU's
emulated firmware should be at EL3 using SMC, otherwise use HVC".
(So in practice for hvf at the moment this will mean the conduit
is always HVC, since hvf doesn't allow EL3 or EL2 in the guest.)
> In hvf, we can very easily trap for SMC calls and handle them. Why are
> we making OSs implement HVC call paths when SMC would work just as well
> for everyone?
OSes have to handle both anyway, because on real hardware if
there is no EL3 then it is IMPDEF whether SMC is trappable
to the hypervisor or whether it just UNDEFs to EL1.
> To keep your train of thought though, what would you do if we encounter
> a conduit that is different from the chosen one? Today, I am aware of 2
> different implementations: TCG injects #UD [1] while KVM sets x0 to -1 [2].
If the SMC or HVC insn isn't being used for PSCI then it should
have its standard architectural behaviour.
-- PMM
- [PATCH v9 04/11] hvf: Add Apple Silicon support, (continued)
- [PATCH v9 04/11] hvf: Add Apple Silicon support, Alexander Graf, 2021/09/12
- [PATCH v9 08/11] arm: Add Hypervisor.framework build target, Alexander Graf, 2021/09/12
- [PATCH v9 10/11] arm: tcg: Adhere to SMCCC 1.3 section 5.2, Alexander Graf, 2021/09/12
- [PATCH v9 09/11] hvf: arm: Add rudimentary PMC support, Alexander Graf, 2021/09/12
- [PATCH v9 06/11] hvf: arm: Implement -cpu host, Alexander Graf, 2021/09/12
- [PATCH v9 07/11] hvf: arm: Implement PSCI handling, Alexander Graf, 2021/09/12
- Re: [PATCH v9 07/11] hvf: arm: Implement PSCI handling, Peter Maydell, 2021/09/13
- Re: [PATCH v9 07/11] hvf: arm: Implement PSCI handling, Alexander Graf, 2021/09/13
- Re: [PATCH v9 07/11] hvf: arm: Implement PSCI handling,
Peter Maydell <=
- Re: [PATCH v9 07/11] hvf: arm: Implement PSCI handling, Alexander Graf, 2021/09/13
- Re: [PATCH v9 07/11] hvf: arm: Implement PSCI handling, Peter Maydell, 2021/09/13
- Re: [PATCH v9 07/11] hvf: arm: Implement PSCI handling, Alexander Graf, 2021/09/13
- Re: [PATCH v9 07/11] hvf: arm: Implement PSCI handling, Marc Zyngier, 2021/09/15
- Re: [PATCH v9 07/11] hvf: arm: Implement PSCI handling, Alexander Graf, 2021/09/15
- Re: [PATCH v9 07/11] hvf: arm: Implement PSCI handling, Marc Zyngier, 2021/09/15
[PATCH v9 11/11] hvf: arm: Adhere to SMCCC 1.3 section 5.2, Alexander Graf, 2021/09/12