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Re: [PATCH v9 07/11] hvf: arm: Implement PSCI handling
From: |
Peter Maydell |
Subject: |
Re: [PATCH v9 07/11] hvf: arm: Implement PSCI handling |
Date: |
Mon, 13 Sep 2021 13:30:57 +0100 |
On Mon, 13 Sept 2021 at 13:02, Alexander Graf <agraf@csgraf.de> wrote:
>
>
> On 13.09.21 13:44, Peter Maydell wrote:
> > On Mon, 13 Sept 2021 at 12:07, Alexander Graf <agraf@csgraf.de> wrote:
> >> To keep your train of thought though, what would you do if we encounter
> >> a conduit that is different from the chosen one? Today, I am aware of 2
> >> different implementations: TCG injects #UD [1] while KVM sets x0 to -1 [2].
> > If the SMC or HVC insn isn't being used for PSCI then it should
> > have its standard architectural behaviour.
>
> Why?
QEMU's assumption here is that there are basically two scenarios
for these instructions:
(1) we're providing an emulation of firmware that uses this
instruction (and only this insn, not the other one) to
provide PSCI services
(2) we're not emulating any firmware at all, we're running it
in the guest, and that guest firmware is providing PSCI
In case (1) we provide a PSCI ABI on the end of the insn.
In case (2) we provide the architectural behaviour for the insn
so that the guest firmware can use it.
We don't currently have
(3) we're providing an emulation of firmware that does something
other than providing PSCI services on this instruction
which is what I think you're asking for. (Alternatively, you might
be after "provide PSCI via SMC, not HVC", ie use a different conduit.
If hvf documents that SMC is guaranteed to trap that would be
possible, I guess.)
> Also, why does KVM behave differently?
Looks like Marc made KVM set x0 to -1 for SMC calls in kernel commit
c0938c72f8070aa; conveniently he's on the cc list here so we can
ask him :-)
> And why does Windows rely on
> SMC availability on boot?
Ask Microsoft, but probably either they don't realize that
SMC might not exist and be trappable, or they only have a limited
set of hosts they care about. CPUs with no EL3 are not that common.
> If you really insist that you don't care about users running Windows
> with TCG and EL2=0, so be it. At least you can enable EL2 and it works
> then. But I can't on hvf. It's one of the most useful use cases for hvf
> on QEMU and I won't break it just because you insist that "SMC behavior
> is IMPDEF, so it must be UNDEF". If it's IMPDEF, it may as well be "set
> x0 to -1 and add 4 to pc".
I am not putting in random hacks for the benefit of specific guest OSes.
If there's a good reason why QEMU's behaviour is wrong then we can change
it, but "I want Windows to boot" doesn't count.
thanks
-- PMM
- [PATCH v9 10/11] arm: tcg: Adhere to SMCCC 1.3 section 5.2, (continued)
- [PATCH v9 10/11] arm: tcg: Adhere to SMCCC 1.3 section 5.2, Alexander Graf, 2021/09/12
- [PATCH v9 09/11] hvf: arm: Add rudimentary PMC support, Alexander Graf, 2021/09/12
- [PATCH v9 06/11] hvf: arm: Implement -cpu host, Alexander Graf, 2021/09/12
- [PATCH v9 07/11] hvf: arm: Implement PSCI handling, Alexander Graf, 2021/09/12
- Re: [PATCH v9 07/11] hvf: arm: Implement PSCI handling, Peter Maydell, 2021/09/13
- Re: [PATCH v9 07/11] hvf: arm: Implement PSCI handling, Alexander Graf, 2021/09/13
- Re: [PATCH v9 07/11] hvf: arm: Implement PSCI handling, Peter Maydell, 2021/09/13
- Re: [PATCH v9 07/11] hvf: arm: Implement PSCI handling, Alexander Graf, 2021/09/13
- Re: [PATCH v9 07/11] hvf: arm: Implement PSCI handling,
Peter Maydell <=
- Re: [PATCH v9 07/11] hvf: arm: Implement PSCI handling, Alexander Graf, 2021/09/13
- Re: [PATCH v9 07/11] hvf: arm: Implement PSCI handling, Marc Zyngier, 2021/09/15
- Re: [PATCH v9 07/11] hvf: arm: Implement PSCI handling, Alexander Graf, 2021/09/15
- Re: [PATCH v9 07/11] hvf: arm: Implement PSCI handling, Marc Zyngier, 2021/09/15
[PATCH v9 11/11] hvf: arm: Adhere to SMCCC 1.3 section 5.2, Alexander Graf, 2021/09/12