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[PULL 38/44] tcg/arm: Support armv4t in tcg_out_goto and tcg_out_call
From: |
Richard Henderson |
Subject: |
[PULL 38/44] tcg/arm: Support armv4t in tcg_out_goto and tcg_out_call |
Date: |
Mon, 13 Sep 2021 17:14:50 -0700 |
ARMv4T has BX as its only interworking instruction. In order
to support testing of different architecture revisions with a
qemu binary that may have been built for, say ARMv6T2, fill in
the blank required to make calls to helpers in thumb mode.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/arm/tcg-target.c.inc | 49 ++++++++++++++++++++++++++++------------
1 file changed, 34 insertions(+), 15 deletions(-)
diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc
index 7d15c36f85..852100bb80 100644
--- a/tcg/arm/tcg-target.c.inc
+++ b/tcg/arm/tcg-target.c.inc
@@ -1211,7 +1211,8 @@ static inline void tcg_out_st8(TCGContext *s, int cond,
tcg_out_st8_12(s, cond, rd, rn, offset);
}
-/* The _goto case is normally between TBs within the same code buffer, and
+/*
+ * The _goto case is normally between TBs within the same code buffer, and
* with the code buffer limited to 16MB we wouldn't need the long case.
* But we also use it for the tail-call to the qemu_ld/st helpers, which does.
*/
@@ -1219,38 +1220,56 @@ static void tcg_out_goto(TCGContext *s, int cond, const
tcg_insn_unit *addr)
{
intptr_t addri = (intptr_t)addr;
ptrdiff_t disp = tcg_pcrel_diff(s, addr);
+ bool arm_mode = !(addri & 1);
- if ((addri & 1) == 0 && disp - 8 < 0x01fffffd && disp - 8 > -0x01fffffd) {
+ if (arm_mode && disp - 8 < 0x01fffffd && disp - 8 > -0x01fffffd) {
tcg_out_b_imm(s, cond, disp);
return;
}
- tcg_out_movi_pool(s, cond, TCG_REG_PC, addri);
+
+ /* LDR is interworking from v5t. */
+ if (arm_mode || use_armv5t_instructions) {
+ tcg_out_movi_pool(s, cond, TCG_REG_PC, addri);
+ return;
+ }
+
+ /* else v4t */
+ tcg_out_movi32(s, COND_AL, TCG_REG_TMP, addri);
+ tcg_out_bx_reg(s, COND_AL, TCG_REG_TMP);
}
-/* The call case is mostly used for helpers - so it's not unreasonable
- * for them to be beyond branch range */
+/*
+ * The call case is mostly used for helpers - so it's not unreasonable
+ * for them to be beyond branch range.
+ */
static void tcg_out_call(TCGContext *s, const tcg_insn_unit *addr)
{
intptr_t addri = (intptr_t)addr;
ptrdiff_t disp = tcg_pcrel_diff(s, addr);
+ bool arm_mode = !(addri & 1);
if (disp - 8 < 0x02000000 && disp - 8 >= -0x02000000) {
- if (addri & 1) {
- /* Use BLX if the target is in Thumb mode */
- if (!use_armv5t_instructions) {
- tcg_abort();
- }
- tcg_out_blx_imm(s, disp);
- } else {
+ if (arm_mode) {
tcg_out_bl_imm(s, COND_AL, disp);
+ return;
}
- } else if (use_armv7_instructions) {
+ if (use_armv5t_instructions) {
+ tcg_out_blx_imm(s, disp);
+ return;
+ }
+ }
+
+ if (use_armv5t_instructions) {
tcg_out_movi32(s, COND_AL, TCG_REG_TMP, addri);
tcg_out_blx_reg(s, COND_AL, TCG_REG_TMP);
- } else {
+ } else if (arm_mode) {
/* ??? Know that movi_pool emits exactly 1 insn. */
- tcg_out_dat_imm(s, COND_AL, ARITH_ADD, TCG_REG_R14, TCG_REG_PC, 0);
+ tcg_out_mov_reg(s, COND_AL, TCG_REG_R14, TCG_REG_PC);
tcg_out_movi_pool(s, COND_AL, TCG_REG_PC, addri);
+ } else {
+ tcg_out_movi32(s, COND_AL, TCG_REG_TMP, addri);
+ tcg_out_mov_reg(s, COND_AL, TCG_REG_R14, TCG_REG_PC);
+ tcg_out_bx_reg(s, COND_AL, TCG_REG_TMP);
}
}
--
2.25.1
- [PULL 26/44] target/riscv: Restrict cpu_exec_interrupt() handler to sysemu, (continued)
- [PULL 26/44] target/riscv: Restrict cpu_exec_interrupt() handler to sysemu, Richard Henderson, 2021/09/13
- [PULL 32/44] user: Remove cpu_get_pic_interrupt() stubs, Richard Henderson, 2021/09/13
- [PULL 27/44] target/sh4: Restrict cpu_exec_interrupt() handler to sysemu, Richard Henderson, 2021/09/13
- [PULL 33/44] user: Mark cpu_loop() with noreturn attribute, Richard Henderson, 2021/09/13
- [PULL 30/44] target/xtensa: Restrict cpu_exec_interrupt() handler to sysemu, Richard Henderson, 2021/09/13
- [PULL 23/44] target/nios2: Restrict cpu_exec_interrupt() handler to sysemu, Richard Henderson, 2021/09/13
- [PULL 19/44] target/i386: Move x86_cpu_exec_interrupt() under sysemu/ folder, Richard Henderson, 2021/09/13
- [PULL 12/44] target/xtensa: Restrict do_transaction_failed() to sysemu, Richard Henderson, 2021/09/13
- [PULL 35/44] tcg/arm: Remove fallback definition of __ARM_ARCH, Richard Henderson, 2021/09/13
- [PULL 38/44] tcg/arm: Support armv4t in tcg_out_goto and tcg_out_call,
Richard Henderson <=
- [PULL 31/44] accel/tcg: Restrict TCGCPUOps::cpu_exec_interrupt() to sysemu, Richard Henderson, 2021/09/13
- [PULL 34/44] accel/tcg/user-exec: Fix read-modify-write of code on s390 hosts, Richard Henderson, 2021/09/13
- [PULL 29/44] target/rx: Restrict cpu_exec_interrupt() handler to sysemu, Richard Henderson, 2021/09/13
- [PULL 37/44] tcg/arm: Simplify use_armv5t_instructions, Richard Henderson, 2021/09/13
- [PULL 39/44] tcg/arm: Split out tcg_out_ldstm, Richard Henderson, 2021/09/13
- [PULL 36/44] tcg/arm: Standardize on tcg_out_<branch>_{reg,imm}, Richard Henderson, 2021/09/13
- [PULL 41/44] tcg/arm: Drop inline markers, Richard Henderson, 2021/09/13
- [PULL 43/44] tcg/arm: More use of the ARMInsn enum, Richard Henderson, 2021/09/13
- [PULL 40/44] tcg/arm: Simplify usage of encode_imm, Richard Henderson, 2021/09/13
- [PULL 44/44] tcg/arm: More use of the TCGReg enum, Richard Henderson, 2021/09/13