Re: [PULL 00/35] tcg patch queue

[Philippe Mathieu-Daudé]

On 9/21/21 11:28, Peter Maydell wrote:
> On Mon, 20 Sept 2021 at 22:16, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> > Forget this crap. The missing piece was:
> >
> > -- >8 --
> > diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c
> > index 0d5adccf1a7..da348938407 100644
> > --- a/target/arm/cpu_tcg.c
> > +++ b/target/arm/cpu_tcg.c
> > @@ -23,6 +23,11 @@
> >   #if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)
> >
> >   #if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG)
> > +static bool arm_v7m_cpu_has_work(CPUState *cs)
> > +{
> > +    return cs->interrupt_request & CPU_INTERRUPT_HARD;
> > +}
>
> Is this really all that's needed ? I would have expected
> at least a check on the power_state.

I started reading the PSCI spec this morning and you are right,
it doesn't seem restricted to A/R profiles, M profiles also have
it.