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Re: [PATCH v5 04/30] tcg/loongarch64: Add generated instruction opcodes
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [PATCH v5 04/30] tcg/loongarch64: Add generated instruction opcodes and encoding helpers |
Date: |
Sat, 25 Sep 2021 16:31:02 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.1.0 |
On 9/25/21 16:20, Richard Henderson wrote:
On 9/24/21 11:51 PM, WANG Xuerui wrote:
Hi all,
On 9/25/21 01:25, WANG Xuerui wrote:
Signed-off-by: WANG Xuerui <git@xen0n.name>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/loongarch64/tcg-insn-defs.c.inc | 979 ++++++++++++++++++++++++++++
1 file changed, 979 insertions(+)
create mode 100644 tcg/loongarch64/tcg-insn-defs.c.inc
This patch series is only lacking Reviewed-by tag for this commit now;
may I ask whose review do I additionally need to get this across the
finish line? Or is this series waiting for upstream merge of toolchain
and kernel support too?
An ack is as good as a review in this case.
I don't normally "review" machine-generated code.
We'd need to review Xuerui's
https://github.com/loongson-community/loongarch-opcodes/tree/develop/scripts/go/genqemutcgdefs
script to add a Reviewed-by here.
While the toolchain is not upstream, the ABI seems solid enough. So
there's no worries on that account. The safe-syscall code has nothing
in it that's kernel api specific, so there's no block there either.
It looks like one more revision to address the valid nits in
tcg_out_movi are all that remains before I can merge this. I'll work
around the conflict with my SIGSEGV patch set, and Cc you for testing
when it is time.
Xuerui said on the cover 1/ we can buy a board on Taobao and 2/ Loongson
might help the community with hardware.
I tried 1/, spend more than 2h to read a translated version of the EULA,
succeeded at the SMS verification, but then when I tried to log in to
search for boards my account got banned with no explanation. This
doesn't seem easy to use outside of China, so I guess we're back on 2/.
Cc'ing other QEMU Loongson contributors in case they might give us ideas
about how to add this arch into our CI.
Regards,
Phil.
[PATCH v5 05/30] tcg/loongarch64: Add register names, allocation order and input/output sets, WANG Xuerui, 2021/09/24
[PATCH v5 07/30] tcg/loongarch64: Implement necessary relocation operations, WANG Xuerui, 2021/09/24
[PATCH v5 06/30] tcg/loongarch64: Define the operand constraints, WANG Xuerui, 2021/09/24
[PATCH v5 08/30] tcg/loongarch64: Implement the memory barrier op, WANG Xuerui, 2021/09/24