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[PATCH v4 26/41] target/hppa: Make hppa_cpu_tlb_fill sysemu only
From: |
Richard Henderson |
Subject: |
[PATCH v4 26/41] target/hppa: Make hppa_cpu_tlb_fill sysemu only |
Date: |
Wed, 6 Oct 2021 10:22:52 -0700 |
The fallback code in cpu_loop_exit_sigsegv is sufficient
for hppa linux-user.
Remove the code from cpu_loop that raised SIGSEGV.
This makes all of the code in mem_helper.c sysemu only,
so remove the ifdefs and move the file to hppa_softmmu_ss.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hppa/cpu.h | 2 +-
linux-user/hppa/cpu_loop.c | 16 ----------------
target/hppa/cpu.c | 2 +-
target/hppa/mem_helper.c | 15 ---------------
target/hppa/meson.build | 6 ++++--
5 files changed, 6 insertions(+), 35 deletions(-)
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index d3cb7a279f..294fd7297f 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -323,10 +323,10 @@ hwaddr hppa_cpu_get_phys_page_debug(CPUState *cs, vaddr
addr);
int hppa_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int hppa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void hppa_cpu_dump_state(CPUState *cs, FILE *f, int);
+#ifndef CONFIG_USER_ONLY
bool hppa_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr);
-#ifndef CONFIG_USER_ONLY
void hppa_cpu_do_interrupt(CPUState *cpu);
bool hppa_cpu_exec_interrupt(CPUState *cpu, int int_req);
int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx,
diff --git a/linux-user/hppa/cpu_loop.c b/linux-user/hppa/cpu_loop.c
index 81607a9b27..e0a62deeb9 100644
--- a/linux-user/hppa/cpu_loop.c
+++ b/linux-user/hppa/cpu_loop.c
@@ -144,22 +144,6 @@ void cpu_loop(CPUHPPAState *env)
env->iaoq_f = env->gr[31];
env->iaoq_b = env->gr[31] + 4;
break;
- case EXCP_ITLB_MISS:
- case EXCP_DTLB_MISS:
- case EXCP_NA_ITLB_MISS:
- case EXCP_NA_DTLB_MISS:
- case EXCP_IMP:
- case EXCP_DMP:
- case EXCP_DMB:
- case EXCP_PAGE_REF:
- case EXCP_DMAR:
- case EXCP_DMPI:
- info.si_signo = TARGET_SIGSEGV;
- info.si_errno = 0;
- info.si_code = TARGET_SEGV_ACCERR;
- info._sifields._sigfault._addr = env->cr[CR_IOR];
- queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
- break;
case EXCP_UNALIGN:
info.si_signo = TARGET_SIGBUS;
info.si_errno = 0;
diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
index 89cba9d7a2..23eb254228 100644
--- a/target/hppa/cpu.c
+++ b/target/hppa/cpu.c
@@ -145,9 +145,9 @@ static const struct SysemuCPUOps hppa_sysemu_ops = {
static const struct TCGCPUOps hppa_tcg_ops = {
.initialize = hppa_translate_init,
.synchronize_from_tb = hppa_cpu_synchronize_from_tb,
- .tlb_fill = hppa_cpu_tlb_fill,
#ifndef CONFIG_USER_ONLY
+ .tlb_fill = hppa_cpu_tlb_fill,
.cpu_exec_interrupt = hppa_cpu_exec_interrupt,
.do_interrupt = hppa_cpu_do_interrupt,
.do_unaligned_access = hppa_cpu_do_unaligned_access,
diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c
index afc5b56c3e..bf07445cd1 100644
--- a/target/hppa/mem_helper.c
+++ b/target/hppa/mem_helper.c
@@ -24,20 +24,6 @@
#include "hw/core/cpu.h"
#include "trace.h"
-#ifdef CONFIG_USER_ONLY
-bool hppa_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
- MMUAccessType access_type, int mmu_idx,
- bool probe, uintptr_t retaddr)
-{
- HPPACPU *cpu = HPPA_CPU(cs);
-
- /* ??? Test between data page fault and data memory protection trap,
- which would affect si_code. */
- cs->exception_index = EXCP_DMP;
- cpu->env.cr[CR_IOR] = address;
- cpu_loop_exit_restore(cs, retaddr);
-}
-#else
static hppa_tlb_entry *hppa_find_tlb(CPUHPPAState *env, vaddr addr)
{
int i;
@@ -392,4 +378,3 @@ int hppa_artype_for_page(CPUHPPAState *env, target_ulong
vaddr)
hppa_tlb_entry *ent = hppa_find_tlb(env, vaddr);
return ent ? ent->ar_type : -1;
}
-#endif /* CONFIG_USER_ONLY */
diff --git a/target/hppa/meson.build b/target/hppa/meson.build
index 8a7ff82efc..021e42a2d0 100644
--- a/target/hppa/meson.build
+++ b/target/hppa/meson.build
@@ -7,13 +7,15 @@ hppa_ss.add(files(
'gdbstub.c',
'helper.c',
'int_helper.c',
- 'mem_helper.c',
'op_helper.c',
'translate.c',
))
hppa_softmmu_ss = ss.source_set()
-hppa_softmmu_ss.add(files('machine.c'))
+hppa_softmmu_ss.add(files(
+ 'machine.c',
+ 'mem_helper.c',
+))
target_arch += {'hppa': hppa_ss}
target_softmmu_arch += {'hppa': hppa_softmmu_ss}
--
2.25.1
- [PATCH v4 05/41] configure: Merge riscv32 and riscv64 host architectures, (continued)
- [PATCH v4 05/41] configure: Merge riscv32 and riscv64 host architectures, Richard Henderson, 2021/10/06
- [PATCH v4 06/41] linux-user: Reorg handling for SIGSEGV, Richard Henderson, 2021/10/06
- [PATCH v4 12/41] linux-user/host/aarch64: Populate host_signal.h, Richard Henderson, 2021/10/06
- [PATCH v4 13/41] linux-user/host/s390: Populate host_signal.h, Richard Henderson, 2021/10/06
- [PATCH v4 14/41] linux-user/host/mips: Populate host_signal.h, Richard Henderson, 2021/10/06
- [PATCH v4 16/41] target/arm: Fixup comment re handle_cpu_signal, Richard Henderson, 2021/10/06
- [PATCH v4 17/41] linux-user/host/riscv: Improve host_signal_write, Richard Henderson, 2021/10/06
- [PATCH v4 10/41] linux-user/host/sparc: Populate host_signal.h, Richard Henderson, 2021/10/06
- [PATCH v4 19/41] hw/core: Add TCGCPUOps.record_sigsegv, Richard Henderson, 2021/10/06
- [PATCH v4 26/41] target/hppa: Make hppa_cpu_tlb_fill sysemu only,
Richard Henderson <=
- [PATCH v4 29/41] target/microblaze: Make mb_cpu_tlb_fill sysemu only, Richard Henderson, 2021/10/06
- [PATCH v4 15/41] linux-user/host/riscv: Populate host_signal.h, Richard Henderson, 2021/10/06
- [PATCH v4 18/41] linux-user/signal: Drop HOST_SIGNAL_PLACEHOLDER, Richard Henderson, 2021/10/06
- [PATCH v4 20/41] linux-user: Add cpu_loop_exit_sigsegv, Richard Henderson, 2021/10/06
- [PATCH v4 21/41] target/alpha: Implement alpha_cpu_record_sigsegv, Richard Henderson, 2021/10/06
- [PATCH v4 23/41] target/arm: Implement arm_cpu_record_sigsegv, Richard Henderson, 2021/10/06
- [PATCH v4 27/41] target/i386: Implement x86_cpu_record_sigsegv, Richard Henderson, 2021/10/06
- [PATCH v4 28/41] target/m68k: Make m68k_cpu_tlb_fill sysemu only, Richard Henderson, 2021/10/06
- [PATCH v4 33/41] target/openrisc: Make openrisc_cpu_tlb_fill sysemu only, Richard Henderson, 2021/10/06