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[PULL 09/18] aspeed/smc: Add default reset values
From: |
Cédric Le Goater |
Subject: |
[PULL 09/18] aspeed/smc: Add default reset values |
Date: |
Tue, 12 Oct 2021 09:37:19 +0200 |
This simplifies the reset handler and has the benefit to remove some
"bad" use of the segments array as an identifier of the controller model.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
include/hw/ssi/aspeed_smc.h | 1 +
hw/ssi/aspeed_smc.c | 52 +++++++++++++++++++------------------
2 files changed, 28 insertions(+), 25 deletions(-)
diff --git a/include/hw/ssi/aspeed_smc.h b/include/hw/ssi/aspeed_smc.h
index ee943228b96f..a1ca0e65c405 100644
--- a/include/hw/ssi/aspeed_smc.h
+++ b/include/hw/ssi/aspeed_smc.h
@@ -98,6 +98,7 @@ struct AspeedSMCClass {
uint8_t nregs_timings;
uint8_t conf_enable_w0;
uint8_t max_peripherals;
+ const uint32_t *resets;
const AspeedSegments *segments;
hwaddr flash_window_base;
uint32_t flash_window_size;
diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index c534e9bf87ee..8cc7ccf45591 100644
--- a/hw/ssi/aspeed_smc.c
+++ b/hw/ssi/aspeed_smc.c
@@ -196,12 +196,9 @@
* controller. These can be changed when board is initialized with the
* Segment Address Registers.
*/
-static const AspeedSegments aspeed_2400_fmc_segments[];
static const AspeedSegments aspeed_2400_spi1_segments[];
-static const AspeedSegments aspeed_2500_fmc_segments[];
static const AspeedSegments aspeed_2500_spi1_segments[];
static const AspeedSegments aspeed_2500_spi2_segments[];
-static const AspeedSegments aspeed_2600_fmc_segments[];
#define ASPEED_SMC_FEATURE_DMA 0x1
#define ASPEED_SMC_FEATURE_DMA_GRANT 0x2
@@ -686,7 +683,11 @@ static void aspeed_smc_reset(DeviceState *d)
AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(s);
int i;
- memset(s->regs, 0, sizeof s->regs);
+ if (asc->resets) {
+ memcpy(s->regs, asc->resets, sizeof s->regs);
+ } else {
+ memset(s->regs, 0, sizeof s->regs);
+ }
/* Unselect all peripherals */
for (i = 0; i < s->num_cs; ++i) {
@@ -700,27 +701,6 @@ static void aspeed_smc_reset(DeviceState *d)
asc->segment_to_reg(s, &asc->segments[i]));
}
- /* HW strapping flash type for the AST2600 controllers */
- if (asc->segments == aspeed_2600_fmc_segments) {
- /* flash type is fixed to SPI for all */
- s->regs[s->r_conf] |= (CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE0);
- s->regs[s->r_conf] |= (CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE1);
- s->regs[s->r_conf] |= (CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE2);
- }
-
- /* HW strapping flash type for FMC controllers */
- if (asc->segments == aspeed_2500_fmc_segments) {
- /* flash type is fixed to SPI for CE0 and CE1 */
- s->regs[s->r_conf] |= (CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE0);
- s->regs[s->r_conf] |= (CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE1);
- }
-
- /* HW strapping for AST2400 FMC controllers (SCU70). Let's use the
- * configuration of the palmetto-bmc machine */
- if (asc->segments == aspeed_2400_fmc_segments) {
- s->regs[s->r_conf] |= (CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE0);
- }
-
s->snoop_index = SNOOP_OFF;
s->snoop_dummies = 0;
}
@@ -1352,6 +1332,14 @@ static const TypeInfo aspeed_2400_smc_info = {
.class_init = aspeed_2400_smc_class_init,
};
+static const uint32_t aspeed_2400_fmc_resets[ASPEED_SMC_R_MAX] = {
+ /*
+ * CE0 and CE1 types are HW strapped in SCU70. Do it here to
+ * simplify the model.
+ */
+ [R_CONF] = CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE0,
+};
+
static const AspeedSegments aspeed_2400_fmc_segments[] = {
{ 0x20000000, 64 * MiB }, /* start address is readonly */
{ 0x24000000, 32 * MiB },
@@ -1374,6 +1362,7 @@ static void aspeed_2400_fmc_class_init(ObjectClass
*klass, void *data)
asc->conf_enable_w0 = CONF_ENABLE_W0;
asc->max_peripherals = 5;
asc->segments = aspeed_2400_fmc_segments;
+ asc->resets = aspeed_2400_fmc_resets;
asc->flash_window_base = 0x20000000;
asc->flash_window_size = 0x10000000;
asc->features = ASPEED_SMC_FEATURE_DMA;
@@ -1424,6 +1413,11 @@ static const TypeInfo aspeed_2400_spi1_info = {
.class_init = aspeed_2400_spi1_class_init,
};
+static const uint32_t aspeed_2500_fmc_resets[ASPEED_SMC_R_MAX] = {
+ [R_CONF] = (CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE0 |
+ CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE1),
+};
+
static const AspeedSegments aspeed_2500_fmc_segments[] = {
{ 0x20000000, 128 * MiB }, /* start address is readonly */
{ 0x28000000, 32 * MiB },
@@ -1444,6 +1438,7 @@ static void aspeed_2500_fmc_class_init(ObjectClass
*klass, void *data)
asc->conf_enable_w0 = CONF_ENABLE_W0;
asc->max_peripherals = 3;
asc->segments = aspeed_2500_fmc_segments;
+ asc->resets = aspeed_2500_fmc_resets;
asc->flash_window_base = 0x20000000;
asc->flash_window_size = 0x10000000;
asc->features = ASPEED_SMC_FEATURE_DMA;
@@ -1569,6 +1564,12 @@ static void aspeed_2600_smc_reg_to_segment(const
AspeedSMCState *s,
}
}
+static const uint32_t aspeed_2600_fmc_resets[ASPEED_SMC_R_MAX] = {
+ [R_CONF] = (CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE0 |
+ CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE1 |
+ CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE2),
+};
+
static const AspeedSegments aspeed_2600_fmc_segments[] = {
{ 0x0, 128 * MiB }, /* start address is readonly */
{ 128 * MiB, 128 * MiB }, /* default is disabled but needed for -kernel */
@@ -1589,6 +1590,7 @@ static void aspeed_2600_fmc_class_init(ObjectClass
*klass, void *data)
asc->conf_enable_w0 = CONF_ENABLE_W0;
asc->max_peripherals = 3;
asc->segments = aspeed_2600_fmc_segments;
+ asc->resets = aspeed_2600_fmc_resets;
asc->flash_window_base = 0x20000000;
asc->flash_window_size = 0x10000000;
asc->features = ASPEED_SMC_FEATURE_DMA |
--
2.31.1
- [PULL 00/18] aspeed queue, Cédric Le Goater, 2021/10/12
- [PULL 05/18] aspeed/smc: Remove the 'flash' attribute from AspeedSMCFlash, Cédric Le Goater, 2021/10/12
- [PULL 11/18] aspeed/smc: Remove unused attribute 'irqline', Cédric Le Goater, 2021/10/12
- [PULL 18/18] aspeed/smc: Dump address offset in trace events, Cédric Le Goater, 2021/10/12
- [PULL 07/18] aspeed/smc: Rename AspeedSMCFlash 'id' to 'cs', Cédric Le Goater, 2021/10/12
- [PULL 10/18] aspeed/smc: Introduce a new addr_width() class handler, Cédric Le Goater, 2021/10/12
- [PULL 13/18] hw: aspeed_gpio: Fix pin I/O type declarations, Cédric Le Goater, 2021/10/12
- [PULL 16/18] hw/arm: Integrate ADC model into Aspeed SoC, Cédric Le Goater, 2021/10/12
- [PULL 09/18] aspeed/smc: Add default reset values,
Cédric Le Goater <=
- [PULL 14/18] hw: aspeed_gpio: Fix GPIO array indexing, Cédric Le Goater, 2021/10/12
- [PULL 17/18] aspeed/wdt: Add trace events, Cédric Le Goater, 2021/10/12
- [PULL 01/18] aspeed/smc: Add watchdog Control/Status Registers, Cédric Le Goater, 2021/10/12
- [PULL 04/18] aspeed/smc: Drop AspeedSMCController structure, Cédric Le Goater, 2021/10/12
- [PULL 12/18] aspeed/i2c: QOMify AspeedI2CBus, Cédric Le Goater, 2021/10/12
- [PULL 03/18] aspeed/smc: Stop using the model name for the memory regions, Cédric Le Goater, 2021/10/12
- [PULL 06/18] aspeed/smc: Remove the 'size' attribute from AspeedSMCFlash, Cédric Le Goater, 2021/10/12
- [PULL 08/18] aspeed/smc: QOMify AspeedSMCFlash, Cédric Le Goater, 2021/10/12
- [PULL 15/18] hw/adc: Add basic Aspeed ADC model, Cédric Le Goater, 2021/10/12
- [PULL 02/18] aspeed/smc: Introduce aspeed_smc_error() helper, Cédric Le Goater, 2021/10/12