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[PATCH v14 4/8] [RISCV_PM] Add J extension state description
From: |
Alexey Baturo |
Subject: |
[PATCH v14 4/8] [RISCV_PM] Add J extension state description |
Date: |
Sun, 17 Oct 2021 20:27:24 +0300 |
Signed-off-by: Alexey Baturo <space.monkey.delivers@gmail.com>
---
target/riscv/machine.c | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/target/riscv/machine.c b/target/riscv/machine.c
index 16a08302da..4d99880797 100644
--- a/target/riscv/machine.c
+++ b/target/riscv/machine.c
@@ -84,6 +84,14 @@ static bool vector_needed(void *opaque)
return riscv_has_ext(env, RVV);
}
+static bool pointermasking_needed(void *opaque)
+{
+ RISCVCPU *cpu = opaque;
+ CPURISCVState *env = &cpu->env;
+
+ return riscv_has_ext(env, RVJ);
+}
+
static const VMStateDescription vmstate_vector = {
.name = "cpu/vector",
.version_id = 1,
@@ -138,6 +146,24 @@ static const VMStateDescription vmstate_hyper = {
}
};
+static const VMStateDescription vmstate_pointermasking = {
+ .name = "cpu/pm",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .needed = pointermasking_needed,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINTTL(env.mmte, RISCVCPU),
+ VMSTATE_UINTTL(env.mpmmask, RISCVCPU),
+ VMSTATE_UINTTL(env.mpmbase, RISCVCPU),
+ VMSTATE_UINTTL(env.spmmask, RISCVCPU),
+ VMSTATE_UINTTL(env.spmbase, RISCVCPU),
+ VMSTATE_UINTTL(env.upmmask, RISCVCPU),
+ VMSTATE_UINTTL(env.upmbase, RISCVCPU),
+
+ VMSTATE_END_OF_LIST()
+ }
+};
+
const VMStateDescription vmstate_riscv_cpu = {
.name = "cpu",
.version_id = 2,
@@ -189,6 +215,7 @@ const VMStateDescription vmstate_riscv_cpu = {
&vmstate_pmp,
&vmstate_hyper,
&vmstate_vector,
+ &vmstate_pointermasking,
NULL
}
};
--
2.30.2
- [PATCH v14 0/8] RISC-V Pointer Masking implementation, Alexey Baturo, 2021/10/17
- [PATCH v14 1/8] [RISCV_PM] Add J-extension into RISC-V, Alexey Baturo, 2021/10/17
- [PATCH v14 2/8] [RISCV_PM] Add CSR defines for RISC-V PM extension, Alexey Baturo, 2021/10/17
- [PATCH v14 3/8] [RISCV_PM] Support CSRs required for RISC-V PM extension except for the h-mode, Alexey Baturo, 2021/10/17
- [PATCH v14 4/8] [RISCV_PM] Add J extension state description,
Alexey Baturo <=
- [PATCH v14 5/8] [RISCV_PM] Print new PM CSRs in QEMU logs, Alexey Baturo, 2021/10/17
- [PATCH v14 6/8] [RISCV_PM] Support pointer masking for RISC-V for i/c/f/d/a types of instructions, Alexey Baturo, 2021/10/17
- [PATCH v14 7/8] [RISCV_PM] Implement address masking functions required for RISC-V Pointer Masking extension, Alexey Baturo, 2021/10/17
- [PATCH v14 8/8] [RISCV_PM] Allow experimental J-ext to be turned on, Alexey Baturo, 2021/10/17