[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v3 06/32] target/mips: Use enum definitions from CPUMIPSMSADataFo
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v3 06/32] target/mips: Use enum definitions from CPUMIPSMSADataFormat enum |
Date: |
Thu, 28 Oct 2021 23:08:17 +0200 |
Replace magic DataFormat value by the corresponding
enum from CPUMIPSMSADataFormat.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/mips/tcg/msa_translate.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/mips/tcg/msa_translate.c b/target/mips/tcg/msa_translate.c
index 242d6ccf669..e4bf42530fc 100644
--- a/target/mips/tcg/msa_translate.c
+++ b/target/mips/tcg/msa_translate.c
@@ -1789,10 +1789,10 @@ static void gen_msa_3rf(DisasContext *ctx)
case OPC_MULR_Q_df:
case OPC_MADDR_Q_df:
case OPC_MSUBR_Q_df:
- tdf = tcg_constant_i32(df + 1);
+ tdf = tcg_constant_i32(DF_HALF + df);
break;
default:
- tdf = tcg_constant_i32(df + 2);
+ tdf = tcg_constant_i32(DF_WORD + df);
break;
}
@@ -2021,7 +2021,7 @@ static void gen_msa_2rf(DisasContext *ctx)
TCGv_i32 twd = tcg_const_i32(wd);
TCGv_i32 tws = tcg_const_i32(ws);
/* adjust df value for floating-point instruction */
- TCGv_i32 tdf = tcg_constant_i32(df + 2);
+ TCGv_i32 tdf = tcg_constant_i32(DF_WORD + df);
switch (MASK_MSA_2RF(ctx->opcode)) {
case OPC_FCLASS_df:
--
2.31.1
- [PATCH v3 00/32] target/mips: Fully convert MSA opcodes to decodetree, Philippe Mathieu-Daudé, 2021/10/28
- [PATCH v3 01/32] target/mips: Fix MSA MADDV.B opcode, Philippe Mathieu-Daudé, 2021/10/28
- [PATCH v3 02/32] target/mips: Fix MSA MSUBV.B opcode, Philippe Mathieu-Daudé, 2021/10/28
- [PATCH v3 03/32] tests/tcg/mips: Run MSA opcodes tests on user-mode emulation, Philippe Mathieu-Daudé, 2021/10/28
- [PATCH v3 04/32] target/mips: Use dup_const() to simplify, Philippe Mathieu-Daudé, 2021/10/28
- [PATCH v3 05/32] target/mips: Have check_msa_access() return a boolean, Philippe Mathieu-Daudé, 2021/10/28
- [PATCH v3 06/32] target/mips: Use enum definitions from CPUMIPSMSADataFormat enum,
Philippe Mathieu-Daudé <=
- [PATCH v3 07/32] target/mips: Rename sa16 -> sa, bz_df -> bz -> bz_v, Philippe Mathieu-Daudé, 2021/10/28
- [PATCH v3 08/32] target/mips: Convert MSA LDI opcode to decodetree, Philippe Mathieu-Daudé, 2021/10/28
- [PATCH v3 09/32] target/mips: Convert MSA I5 instruction format to decodetree, Philippe Mathieu-Daudé, 2021/10/28
- [PATCH v3 11/32] target/mips: Convert MSA SHF opcode to decodetree, Philippe Mathieu-Daudé, 2021/10/28
- [PATCH v3 12/32] target/mips: Convert MSA I8 instruction format to decodetree, Philippe Mathieu-Daudé, 2021/10/28
- [PATCH v3 10/32] target/mips: Convert MSA BIT instruction format to decodetree, Philippe Mathieu-Daudé, 2021/10/28
- [PATCH v3 13/32] target/mips: Convert MSA load/store instruction format to decodetree, Philippe Mathieu-Daudé, 2021/10/28
- [PATCH v3 15/32] target/mips: Convert MSA FILL opcode to decodetree, Philippe Mathieu-Daudé, 2021/10/28
- [PATCH v3 14/32] target/mips: Convert MSA 2RF instruction format to decodetree, Philippe Mathieu-Daudé, 2021/10/28