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[PATCH v5 08/15] target/ppc: Do not update nip on DFP instructions
From: |
Luis Pires |
Subject: |
[PATCH v5 08/15] target/ppc: Do not update nip on DFP instructions |
Date: |
Fri, 29 Oct 2021 16:24:10 -0300 |
Before moving the existing DFP instructions to decodetree, drop the
nip update that shouldn't be done for these instructions.
Signed-off-by: Luis Pires <luis.pires@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/ppc/translate/dfp-impl.c.inc | 8 --------
1 file changed, 8 deletions(-)
diff --git a/target/ppc/translate/dfp-impl.c.inc
b/target/ppc/translate/dfp-impl.c.inc
index e149777481..1431d955c6 100644
--- a/target/ppc/translate/dfp-impl.c.inc
+++ b/target/ppc/translate/dfp-impl.c.inc
@@ -15,7 +15,6 @@ static void gen_##name(DisasContext *ctx) \
gen_exception(ctx, POWERPC_EXCP_FPU); \
return; \
} \
- gen_update_nip(ctx, ctx->base.pc_next - 4); \
rd = gen_fprp_ptr(rD(ctx->opcode)); \
ra = gen_fprp_ptr(rA(ctx->opcode)); \
rb = gen_fprp_ptr(rB(ctx->opcode)); \
@@ -36,7 +35,6 @@ static void gen_##name(DisasContext *ctx) \
gen_exception(ctx, POWERPC_EXCP_FPU); \
return; \
} \
- gen_update_nip(ctx, ctx->base.pc_next - 4); \
ra = gen_fprp_ptr(rA(ctx->opcode)); \
rb = gen_fprp_ptr(rB(ctx->opcode)); \
gen_helper_##name(cpu_crf[crfD(ctx->opcode)], \
@@ -54,7 +52,6 @@ static void gen_##name(DisasContext *ctx) \
gen_exception(ctx, POWERPC_EXCP_FPU); \
return; \
} \
- gen_update_nip(ctx, ctx->base.pc_next - 4); \
uim = tcg_const_i32(UIMM5(ctx->opcode)); \
rb = gen_fprp_ptr(rB(ctx->opcode)); \
gen_helper_##name(cpu_crf[crfD(ctx->opcode)], \
@@ -72,7 +69,6 @@ static void gen_##name(DisasContext *ctx) \
gen_exception(ctx, POWERPC_EXCP_FPU); \
return; \
} \
- gen_update_nip(ctx, ctx->base.pc_next - 4); \
ra = gen_fprp_ptr(rA(ctx->opcode)); \
dcm = tcg_const_i32(DCM(ctx->opcode)); \
gen_helper_##name(cpu_crf[crfD(ctx->opcode)], \
@@ -90,7 +86,6 @@ static void gen_##name(DisasContext *ctx) \
gen_exception(ctx, POWERPC_EXCP_FPU); \
return; \
} \
- gen_update_nip(ctx, ctx->base.pc_next - 4); \
rt = gen_fprp_ptr(rD(ctx->opcode)); \
rb = gen_fprp_ptr(rB(ctx->opcode)); \
u32_1 = tcg_const_i32(u32f1(ctx->opcode)); \
@@ -114,7 +109,6 @@ static void gen_##name(DisasContext *ctx) \
gen_exception(ctx, POWERPC_EXCP_FPU); \
return; \
} \
- gen_update_nip(ctx, ctx->base.pc_next - 4); \
rt = gen_fprp_ptr(rD(ctx->opcode)); \
ra = gen_fprp_ptr(rA(ctx->opcode)); \
rb = gen_fprp_ptr(rB(ctx->opcode)); \
@@ -137,7 +131,6 @@ static void gen_##name(DisasContext *ctx) \
gen_exception(ctx, POWERPC_EXCP_FPU); \
return; \
} \
- gen_update_nip(ctx, ctx->base.pc_next - 4); \
rt = gen_fprp_ptr(rD(ctx->opcode)); \
rb = gen_fprp_ptr(rB(ctx->opcode)); \
gen_helper_##name(cpu_env, rt, rb); \
@@ -157,7 +150,6 @@ static void gen_##name(DisasContext *ctx) \
gen_exception(ctx, POWERPC_EXCP_FPU); \
return; \
} \
- gen_update_nip(ctx, ctx->base.pc_next - 4); \
rt = gen_fprp_ptr(rD(ctx->opcode)); \
rs = gen_fprp_ptr(fprfld(ctx->opcode)); \
i32 = tcg_const_i32(i32fld(ctx->opcode)); \
--
2.25.1
- [PATCH v5 00/15] target/ppc: DFP instructions using decodetree, Luis Pires, 2021/10/29
- [PATCH v5 01/15] libdecnumber: introduce decNumberFrom[U]Int128, Luis Pires, 2021/10/29
- [PATCH v5 02/15] target/ppc: Move REQUIRE_ALTIVEC/VECTOR to translate.c, Luis Pires, 2021/10/29
- [PATCH v5 03/15] target/ppc: Introduce REQUIRE_FPU, Luis Pires, 2021/10/29
- [PATCH v5 04/15] target/ppc: Implement DCFFIXQQ, Luis Pires, 2021/10/29
- [PATCH v5 05/15] host-utils: Introduce mulu128, Luis Pires, 2021/10/29
- [PATCH v5 06/15] libdecnumber: Introduce decNumberIntegralToInt128, Luis Pires, 2021/10/29
- [PATCH v5 07/15] target/ppc: Implement DCTFIXQQ, Luis Pires, 2021/10/29
- [PATCH v5 08/15] target/ppc: Do not update nip on DFP instructions,
Luis Pires <=
- [PATCH v5 09/15] target/ppc: Move dtstdc[q]/dtstdg[q] to decodetree, Luis Pires, 2021/10/29
- [PATCH v5 10/15] target/ppc: Move d{add, sub, mul, div, iex}[q] to decodetree, Luis Pires, 2021/10/29
- [PATCH v5 11/15] target/ppc: Move dcmp{u, o}[q], dts{tex, tsf, tsfi}[q] to decodetree, Luis Pires, 2021/10/29
- [PATCH v5 12/15] target/ppc: Move dquai[q], drint{x, n}[q] to decodetree, Luis Pires, 2021/10/29
- [PATCH v5 13/15] target/ppc: Move dqua[q], drrnd[q] to decodetree, Luis Pires, 2021/10/29
- [PATCH v5 14/15] target/ppc: Move dct{dp, qpq}, dr{sp, dpq}, dc{f, t}fix[q], dxex[q] to decodetree, Luis Pires, 2021/10/29
- [PATCH v5 15/15] target/ppc: Move ddedpd[q], denbcd[q], dscli[q], dscri[q] to decodetree, Luis Pires, 2021/10/29
- Re: [PATCH v5 00/15] target/ppc: DFP instructions using decodetree, David Gibson, 2021/10/31