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[PULL 32/60] linux-user/openrisc: Abort for EXCP_RANGE, EXCP_FPE
From: |
Richard Henderson |
Subject: |
[PULL 32/60] linux-user/openrisc: Abort for EXCP_RANGE, EXCP_FPE |
Date: |
Tue, 2 Nov 2021 07:07:12 -0400 |
QEMU does not allow the system control bits for either exception to
be enabled in linux-user, therefore both exceptions are dead code.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
linux-user/openrisc/cpu_loop.c | 17 +++++++++--------
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/linux-user/openrisc/cpu_loop.c b/linux-user/openrisc/cpu_loop.c
index f6360db47c..10b7147f68 100644
--- a/linux-user/openrisc/cpu_loop.c
+++ b/linux-user/openrisc/cpu_loop.c
@@ -56,7 +56,6 @@ void cpu_loop(CPUOpenRISCState *env)
break;
case EXCP_DPF:
case EXCP_IPF:
- case EXCP_RANGE:
info.si_signo = TARGET_SIGSEGV;
info.si_errno = 0;
info.si_code = TARGET_SEGV_MAPERR;
@@ -77,13 +76,6 @@ void cpu_loop(CPUOpenRISCState *env)
info._sifields._sigfault._addr = env->pc;
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
break;
- case EXCP_FPE:
- info.si_signo = TARGET_SIGFPE;
- info.si_errno = 0;
- info.si_code = 0;
- info._sifields._sigfault._addr = env->pc;
- queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
- break;
case EXCP_INTERRUPT:
/* We processed the pending cpu work above. */
break;
@@ -96,6 +88,15 @@ void cpu_loop(CPUOpenRISCState *env)
case EXCP_ATOMIC:
cpu_exec_step_atomic(cs);
break;
+ case EXCP_RANGE:
+ /* Requires SR.OVE set, which linux-user won't do. */
+ cpu_abort(cs, "Unexpected RANGE exception");
+ case EXCP_FPE:
+ /*
+ * Requires FPSCR.FPEE set. Writes to FPSCR from usermode not
+ * yet enabled in kernel ABI, so linux-user does not either.
+ */
+ cpu_abort(cs, "Unexpected FPE exception");
default:
g_assert_not_reached();
}
--
2.25.1
- [PULL 12/60] linux-user/host/aarch64: Populate host_signal.h, (continued)
- [PULL 12/60] linux-user/host/aarch64: Populate host_signal.h, Richard Henderson, 2021/11/02
- [PULL 08/60] linux-user/host/ppc: Populate host_signal.h, Richard Henderson, 2021/11/02
- [PULL 17/60] linux-user/host/riscv: Improve host_signal_write, Richard Henderson, 2021/11/02
- [PULL 21/60] target/alpha: Implement alpha_cpu_record_sigsegv, Richard Henderson, 2021/11/02
- [PULL 19/60] hw/core: Add TCGCPUOps.record_sigsegv, Richard Henderson, 2021/11/02
- [PULL 25/60] target/hexagon: Remove hexagon_cpu_tlb_fill, Richard Henderson, 2021/11/02
- [PULL 30/60] target/mips: Make mips_cpu_tlb_fill sysemu only, Richard Henderson, 2021/11/02
- [PULL 05/60] configure: Merge riscv32 and riscv64 host architectures, Richard Henderson, 2021/11/02
- [PULL 15/60] linux-user/host/riscv: Populate host_signal.h, Richard Henderson, 2021/11/02
- [PULL 28/60] target/m68k: Make m68k_cpu_tlb_fill sysemu only, Richard Henderson, 2021/11/02
- [PULL 32/60] linux-user/openrisc: Abort for EXCP_RANGE, EXCP_FPE,
Richard Henderson <=
- [PULL 24/60] target/cris: Make cris_cpu_tlb_fill sysemu only, Richard Henderson, 2021/11/02
- [PULL 23/60] target/arm: Implement arm_cpu_record_sigsegv, Richard Henderson, 2021/11/02
- [PULL 35/60] target/riscv: Make riscv_cpu_tlb_fill sysemu only, Richard Henderson, 2021/11/02
- [PULL 31/60] target/nios2: Implement nios2_cpu_record_sigsegv, Richard Henderson, 2021/11/02
- [PULL 10/60] linux-user/host/sparc: Populate host_signal.h, Richard Henderson, 2021/11/02
- [PULL 27/60] target/i386: Implement x86_cpu_record_sigsegv, Richard Henderson, 2021/11/02
- [PULL 22/60] target/arm: Use cpu_loop_exit_sigsegv for mte tag lookup, Richard Henderson, 2021/11/02
- [PULL 38/60] target/sh4: Make sh4_cpu_tlb_fill sysemu only, Richard Henderson, 2021/11/02
- [PULL 34/60] target/ppc: Implement ppc_cpu_record_sigsegv, Richard Henderson, 2021/11/02
- [PULL 07/60] linux-user/host/x86: Populate host_signal.h, Richard Henderson, 2021/11/02