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[PULL 47/60] target/microblaze: Do not set MO_ALIGN for user-only
From: |
Richard Henderson |
Subject: |
[PULL 47/60] target/microblaze: Do not set MO_ALIGN for user-only |
Date: |
Tue, 2 Nov 2021 07:07:27 -0400 |
The kernel will fix up unaligned accesses, so emulate that
by allowing unaligned accesses to succeed.
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/microblaze/translate.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index 437bbed6d6..2561b904b9 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -722,6 +722,7 @@ static TCGv compute_ldst_addr_ea(DisasContext *dc, int ra,
int rb)
}
#endif
+#ifndef CONFIG_USER_ONLY
static void record_unaligned_ess(DisasContext *dc, int rd,
MemOp size, bool store)
{
@@ -734,6 +735,7 @@ static void record_unaligned_ess(DisasContext *dc, int rd,
tcg_set_insn_start_param(dc->insn_start, 1, iflags);
}
+#endif
static bool do_load(DisasContext *dc, int rd, TCGv addr, MemOp mop,
int mem_index, bool rev)
@@ -755,12 +757,19 @@ static bool do_load(DisasContext *dc, int rd, TCGv addr,
MemOp mop,
}
}
+ /*
+ * For system mode, enforce alignment if the cpu configuration
+ * requires it. For user-mode, the Linux kernel will have fixed up
+ * any unaligned access, so emulate that by *not* setting MO_ALIGN.
+ */
+#ifndef CONFIG_USER_ONLY
if (size > MO_8 &&
(dc->tb_flags & MSR_EE) &&
dc->cfg->unaligned_exceptions) {
record_unaligned_ess(dc, rd, size, false);
mop |= MO_ALIGN;
}
+#endif
tcg_gen_qemu_ld_i32(reg_for_write(dc, rd), addr, mem_index, mop);
@@ -901,12 +910,19 @@ static bool do_store(DisasContext *dc, int rd, TCGv addr,
MemOp mop,
}
}
+ /*
+ * For system mode, enforce alignment if the cpu configuration
+ * requires it. For user-mode, the Linux kernel will have fixed up
+ * any unaligned access, so emulate that by *not* setting MO_ALIGN.
+ */
+#ifndef CONFIG_USER_ONLY
if (size > MO_8 &&
(dc->tb_flags & MSR_EE) &&
dc->cfg->unaligned_exceptions) {
record_unaligned_ess(dc, rd, size, true);
mop |= MO_ALIGN;
}
+#endif
tcg_gen_qemu_st_i32(reg_for_read(dc, rd), addr, mem_index, mop);
--
2.25.1
- [PULL 14/60] linux-user/host/mips: Populate host_signal.h, (continued)
- [PULL 14/60] linux-user/host/mips: Populate host_signal.h, Richard Henderson, 2021/11/02
- [PULL 33/60] target/openrisc: Make openrisc_cpu_tlb_fill sysemu only, Richard Henderson, 2021/11/02
- [PULL 40/60] target/xtensa: Make xtensa_cpu_tlb_fill sysemu only, Richard Henderson, 2021/11/02
- [PULL 42/60] hw/core: Add TCGCPUOps.record_sigbus, Richard Henderson, 2021/11/02
- [PULL 45/60] target/arm: Implement arm_cpu_record_sigbus, Richard Henderson, 2021/11/02
- [PULL 44/60] target/alpha: Implement alpha_cpu_record_sigbus, Richard Henderson, 2021/11/02
- [PULL 43/60] linux-user: Add cpu_loop_exit_sigbus, Richard Henderson, 2021/11/02
- [PULL 46/60] linux-user/hppa: Remove EXCP_UNALIGN handling, Richard Henderson, 2021/11/02
- [PULL 48/60] target/ppc: Move SPR_DSISR setting to powerpc_excp, Richard Henderson, 2021/11/02
- [PULL 41/60] accel/tcg: Restrict TCGCPUOps::tlb_fill() to sysemu, Richard Henderson, 2021/11/02
- [PULL 47/60] target/microblaze: Do not set MO_ALIGN for user-only,
Richard Henderson <=
- [PULL 49/60] target/ppc: Set fault address in ppc_cpu_do_unaligned_access, Richard Henderson, 2021/11/02
- [PULL 50/60] target/ppc: Restrict ppc_cpu_do_unaligned_access to sysemu, Richard Henderson, 2021/11/02
- [PULL 52/60] target/s390x: Implement s390x_cpu_record_sigbus, Richard Henderson, 2021/11/02
- [PULL 54/60] target/sparc: Remove DEBUG_UNALIGNED, Richard Henderson, 2021/11/02
- [PULL 57/60] accel/tcg: Report unaligned atomics for user-only, Richard Henderson, 2021/11/02
- [PULL 56/60] target/sparc: Set fault address in sparc_cpu_do_unaligned_access, Richard Henderson, 2021/11/02
- [PULL 55/60] target/sparc: Split out build_sfsr, Richard Henderson, 2021/11/02
- [PULL 51/60] linux-user/ppc: Remove POWERPC_EXCP_ALIGN handling, Richard Henderson, 2021/11/02
- [PULL 53/60] target/sh4: Set fault address in superh_cpu_do_unaligned_access, Richard Henderson, 2021/11/02
- [PULL 58/60] accel/tcg: Report unaligned load/store for user-only, Richard Henderson, 2021/11/02