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Re: [PATCH 05/15] hw/nvme: Add support for SR-IOV
From: |
Klaus Jensen |
Subject: |
Re: [PATCH 05/15] hw/nvme: Add support for SR-IOV |
Date: |
Tue, 2 Nov 2021 15:33:15 +0100 |
On Oct 7 18:23, Lukasz Maniak wrote:
> This patch implements initial support for Single Root I/O Virtualization
> on an NVMe device.
>
> Essentially, it allows to define the maximum number of virtual functions
> supported by the NVMe controller via sriov_max_vfs parameter.
>
> Passing a non-zero value to sriov_max_vfs triggers reporting of SR-IOV
> capability by a physical controller and ARI capability by both the
> physical and virtual function devices.
>
> NVMe controllers created via virtual functions mirror functionally
> the physical controller, which may not entirely be the case, thus
> consideration would be needed on the way to limit the capabilities of
> the VF.
>
> NVMe subsystem is required for the use of SR-IOV.
>
> Signed-off-by: Lukasz Maniak <lukasz.maniak@linux.intel.com>
> ---
> hw/nvme/ctrl.c | 74 ++++++++++++++++++++++++++++++++++++++--
> hw/nvme/nvme.h | 1 +
> include/hw/pci/pci_ids.h | 1 +
> 3 files changed, 73 insertions(+), 3 deletions(-)
>
> diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
> index 6a571d18cf..ad79ff0c00 100644
> --- a/hw/nvme/ctrl.c
> +++ b/hw/nvme/ctrl.c
> @@ -6361,8 +6406,12 @@ static int nvme_init_pci(NvmeCtrl *n, PCIDevice
> *pci_dev, Error **errp)
> n->reg_size);
> memory_region_add_subregion(&n->bar0, 0, &n->iomem);
>
> - pci_register_bar(pci_dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY |
> - PCI_BASE_ADDRESS_MEM_TYPE_64, &n->bar0);
> + if (pci_is_vf(pci_dev)) {
> + pcie_sriov_vf_register_bar(pci_dev, 0, &n->bar0);
> + } else {
> + pci_register_bar(pci_dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY |
> + PCI_BASE_ADDRESS_MEM_TYPE_64, &n->bar0);
> + }
I assume that the assert we are seeing means that the pci_register_bars
in nvme_init_cmb and nvme_init_pmr must be changed similarly to this.
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- Re: [PATCH 05/15] hw/nvme: Add support for SR-IOV,
Klaus Jensen <=