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Re: Qemu and ARM secure state.

From: Peter Maydell
Subject: Re: Qemu and ARM secure state.
Date: Mon, 8 Nov 2021 14:50:12 +0000

On Sat, 6 Nov 2021 at 18:11, Jean-Christophe DUBOIS <jcd@tribudubois.net> wrote:
> One small question/remark:
> According to the the "Arm Power State Coordinate Interface" (DEN0022D.b) 
> document (chapter 5) PSCI calls can only be issued by "normal world" (EL1 or 
> EL2). Therefore, should we be adding a test for the current secure state in 
> the arm_is_psci_call() function? This would prevent calling the built-in Qemu 
> PSCI function if SMC is issued  from secure state.

This shouldn't matter, because if the machine model is configured
to execute guest code in EL3 at all then it should not be enabling
QEMU's internal PSCI support. The internal PSCI stuff is only
there as a kind of "emulated firmware" for when we're running
guest code that starts at EL2 (notably, when directly booting
a Linux kernel).

The problem seems to be that fsl_imx6ul_realize() and
fsl_imx7_realize() unconditionally enable PSCI-via-SMC.
The imx7 code also puts all the secondaries into
PSCI-powered-off mode -- this should be checked to
work out what the right thing is if we're not doing
emulated PSCI and instead starting the guest at EL3.

-- PMM

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