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[PULL 48/54] target/ppc: Implemented XXSPLTIW using decodetree
From: |
David Gibson |
Subject: |
[PULL 48/54] target/ppc: Implemented XXSPLTIW using decodetree |
Date: |
Tue, 9 Nov 2021 16:51:58 +1100 |
From: "Bruno Larsen (billionai)" <bruno.larsen@eldorado.org.br>
Implemented the XXSPLTIW instruction, using decodetree.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-22-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
target/ppc/insn64.decode | 6 ++++++
target/ppc/translate/vsx-impl.c.inc | 10 ++++++++++
2 files changed, 16 insertions(+)
diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode
index 134bc60c57..bd71f616cc 100644
--- a/target/ppc/insn64.decode
+++ b/target/ppc/insn64.decode
@@ -39,6 +39,10 @@
@8RR_D_IX ...... .. .... .. .. ................ \
...... ..... ... ix:1 . ................ \
&8RR_D_IX si=%8rr_si xt=%8rr_xt
+&8RR_D xt si:int32_t
+@8RR_D ...... .. .... .. .. ................ \
+ ...... ..... .... . ................ \
+ &8RR_D si=%8rr_si xt=%8rr_xt
### Fixed-Point Load Instructions
@@ -165,5 +169,7 @@ PLXVP 000001 00 0--.-- .................. \
PSTXVP 000001 00 0--.-- .................. \
111110 ..... ..... ................ @8LS_D_TSXP
+XXSPLTIW 000001 01 0000 -- -- ................ \
+ 100000 ..... 0011 . ................ @8RR_D
XXSPLTI32DX 000001 01 0000 -- -- ................ \
100000 ..... 000 .. ................ @8RR_D_IX
diff --git a/target/ppc/translate/vsx-impl.c.inc
b/target/ppc/translate/vsx-impl.c.inc
index 360593a9ab..7116141a6a 100644
--- a/target/ppc/translate/vsx-impl.c.inc
+++ b/target/ppc/translate/vsx-impl.c.inc
@@ -1466,6 +1466,16 @@ static bool trans_XXSPLTIB(DisasContext *ctx, arg_X_imm8
*a)
return true;
}
+static bool trans_XXSPLTIW(DisasContext *ctx, arg_8RR_D *a)
+{
+ REQUIRE_INSNS_FLAGS2(ctx, ISA310);
+ REQUIRE_VSX(ctx);
+
+ tcg_gen_gvec_dup_imm(MO_32, vsr_full_offset(a->xt), 16, 16, a->si);
+
+ return true;
+}
+
static bool trans_XXSPLTI32DX(DisasContext *ctx, arg_8RR_D_IX *a)
{
TCGv_i32 imm;
--
2.33.1
- [PULL 26/54] ppc/pnv: Fix check on block device before updating drive contents, (continued)
- [PULL 26/54] ppc/pnv: Fix check on block device before updating drive contents, David Gibson, 2021/11/09
- [PULL 34/54] target/ppc: Implement Vector Insert from VSR using GPR index insns, David Gibson, 2021/11/09
- [PULL 30/54] target/ppc: Implement vpdepd/vpextd instruction, David Gibson, 2021/11/09
- [PULL 21/54] target/ppc: Move dcmp{u, o}[q], dts{tex, tsf, tsfi}[q] to decodetree, David Gibson, 2021/11/09
- [PULL 38/54] target/ppc: receive high/low as argument in get/set_cpu_vsr, David Gibson, 2021/11/09
- [PULL 39/54] target/ppc: moved stxv and lxv from legacy to decodtree, David Gibson, 2021/11/09
- [PULL 33/54] target/ppc: Implement Vector Insert Word from GPR using Immediate insns, David Gibson, 2021/11/09
- [PULL 35/54] target/ppc: Move vinsertb/vinserth/vinsertw/vinsertd to decodetree, David Gibson, 2021/11/09
- [PULL 37/54] target/ppc: Introduce REQUIRE_VSX macro, David Gibson, 2021/11/09
- [PULL 40/54] target/ppc: moved stxvx and lxvx from legacy to decodtree, David Gibson, 2021/11/09
- [PULL 48/54] target/ppc: Implemented XXSPLTIW using decodetree,
David Gibson <=
- [PULL 41/54] target/ppc: added the instructions LXVP and STXVP, David Gibson, 2021/11/09
- [PULL 42/54] target/ppc: added the instructions LXVPX and STXVPX, David Gibson, 2021/11/09
- [PULL 43/54] target/ppc: added the instructions PLXV and PSTXV, David Gibson, 2021/11/09
- [PULL 49/54] target/ppc: implemented XXSPLTIDP instruction, David Gibson, 2021/11/09
- [PULL 44/54] target/ppc: added the instructions PLXVP and PSTXVP, David Gibson, 2021/11/09
- [PULL 47/54] target/ppc: implemented XXSPLTI32DX, David Gibson, 2021/11/09
- [PULL 45/54] target/ppc: moved XXSPLTW to using decodetree, David Gibson, 2021/11/09
- [PULL 46/54] target/ppc: moved XXSPLTIB to using decodetree, David Gibson, 2021/11/09
- [PULL 50/54] target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd instructions, David Gibson, 2021/11/09
- [PULL 51/54] target/ppc: Implement lxvkq instruction, David Gibson, 2021/11/09