Re: [RFC PATCH v2 02/30] target/loongarch: Add CSR registers definition

[Richard Henderson]

On 11/12/21 3:14 AM, yangxiaojuan wrote:
> > > +#define  EXCODE_IP                   64
> >
> > What's this?
>
> The manual 6.1.3 says the exception number of an interrupt is the exception 
> number plus an offset of 64. This defines the offset, sorry, the name is bad, 
> maybe change a name or just use 64 directly in the exception handle is better.
Perhaps

#define EXCCODE_EXTERNAL_INT   64   /* plus external interrupt number */

?

r~