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Re: [PATCH v10 04/26] target/loongarch: Add fixed point arithmetic instr


From: Richard Henderson
Subject: Re: [PATCH v10 04/26] target/loongarch: Add fixed point arithmetic instruction translation
Date: Fri, 12 Nov 2021 15:05:49 +0100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0

On 11/12/21 7:53 AM, Song Gao wrote:
+#
+# Fields
+#
+%rd      0:5
+%rj      5:5
+%rk      10:5
+%sa2     15:2
+%si12    10:s12
+%ui12    10:12
+%si16    10:s16
+%si20    5:s20

You should only create separate field definitions like this when they are complex: e.g. the logical field is disjoint or there's a need for !function.

+
+#
+# Argument sets
+#
+&fmt_rdrjrk         rd rj rk
+&fmt_rdrjsi12       rd rj si12
+&fmt_rdrjrksa2      rd rj rk sa2
+&fmt_rdrjsi16       rd rj si16
+&fmt_rdrjui12       rd rj ui12
+&fmt_rdsi20         rd si20

Some of these should be combined. The width of the immediate is a detail of the format, not the decoded argument set. Thus you should have

&fmt_rdimm     rd imm
&fmt_rdrjimm   rd rj imm
&fmt_rdrjrk    rd rj rk
&fmt_rdrjrksa  rd rj rk sa

+alsl_w           0000 00000000 010 .. ..... ..... .....   @fmt_rdrjrksa2
+alsl_wu          0000 00000000 011 .. ..... ..... .....   @fmt_rdrjrksa2
+alsl_d           0000 00000010 110 .. ..... ..... .....   @fmt_rdrjrksa2

The encoding of these insns is that the shift is sa+1.

While you compensate for this in gen_alsl_*, we print the "wrong" number in the disassembly. I think it would be better to do

%sa2p1     15:2 !function=plus_1
@fmt_rdrjrksa2p1  .... ........ ... .. rk:5 rj:5 rd:5 \
                  &fmt_rdrjrksa sa=%sa2p1


r~



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