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[PATCH v9 02/31] MAINTAINERS: Add tcg/loongarch64 entry with myself as m
From: |
WANG Xuerui |
Subject: |
[PATCH v9 02/31] MAINTAINERS: Add tcg/loongarch64 entry with myself as maintainer |
Date: |
Tue, 14 Dec 2021 16:01:25 +0800 |
I ported the initial code, so I should maintain it of course.
Signed-off-by: WANG Xuerui <git@xen0n.name>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
MAINTAINERS | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 3fd57f8fac..1312a00f0d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3138,6 +3138,11 @@ S: Maintained
F: tcg/i386/
F: disas/i386.c
+LoongArch64 TCG target
+M: WANG Xuerui <git@xen0n.name>
+S: Maintained
+F: tcg/loongarch64/
+
MIPS TCG target
M: Philippe Mathieu-Daudé <f4bug@amsat.org>
R: Aurelien Jarno <aurelien@aurel32.net>
--
2.34.0
- [PATCH v9 00/31] LoongArch64 port of QEMU TCG, WANG Xuerui, 2021/12/14
- [PATCH v9 01/31] elf: Add machine type value for LoongArch, WANG Xuerui, 2021/12/14
- [PATCH v9 03/31] tcg/loongarch64: Add the tcg-target.h file, WANG Xuerui, 2021/12/14
- [PATCH v9 02/31] MAINTAINERS: Add tcg/loongarch64 entry with myself as maintainer,
WANG Xuerui <=
- [PATCH v9 04/31] tcg/loongarch64: Add generated instruction opcodes and encoding helpers, WANG Xuerui, 2021/12/14
- [PATCH v9 06/31] tcg/loongarch64: Define the operand constraints, WANG Xuerui, 2021/12/14
- [PATCH v9 07/31] tcg/loongarch64: Implement necessary relocation operations, WANG Xuerui, 2021/12/14
- [PATCH v9 05/31] tcg/loongarch64: Add register names, allocation order and input/output sets, WANG Xuerui, 2021/12/14
- [PATCH v9 08/31] tcg/loongarch64: Implement the memory barrier op, WANG Xuerui, 2021/12/14
- [PATCH v9 10/31] tcg/loongarch64: Implement goto_ptr, WANG Xuerui, 2021/12/14
- [PATCH v9 09/31] tcg/loongarch64: Implement tcg_out_mov and tcg_out_movi, WANG Xuerui, 2021/12/14
- [PATCH v9 11/31] tcg/loongarch64: Implement sign-/zero-extension ops, WANG Xuerui, 2021/12/14