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[PULL 14/33] target/arm: Split compute_fsr_fsc out of arm_deliver_fault
From: |
Peter Maydell |
Subject: |
[PULL 14/33] target/arm: Split compute_fsr_fsc out of arm_deliver_fault |
Date: |
Wed, 15 Dec 2021 10:40:30 +0000 |
From: Richard Henderson <richard.henderson@linaro.org>
We will reuse this section of arm_deliver_fault for
raising pc alignment faults.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/tlb_helper.c | 45 +++++++++++++++++++++++++----------------
1 file changed, 28 insertions(+), 17 deletions(-)
diff --git a/target/arm/tlb_helper.c b/target/arm/tlb_helper.c
index 12a934e9248..4cacb9658fb 100644
--- a/target/arm/tlb_helper.c
+++ b/target/arm/tlb_helper.c
@@ -49,25 +49,11 @@ static inline uint32_t merge_syn_data_abort(uint32_t
template_syn,
return syn;
}
-static void QEMU_NORETURN arm_deliver_fault(ARMCPU *cpu, vaddr addr,
- MMUAccessType access_type,
- int mmu_idx, ARMMMUFaultInfo *fi)
+static uint32_t compute_fsr_fsc(CPUARMState *env, ARMMMUFaultInfo *fi,
+ int target_el, int mmu_idx, uint32_t *ret_fsc)
{
- CPUARMState *env = &cpu->env;
- int target_el;
- bool same_el;
- uint32_t syn, exc, fsr, fsc;
ARMMMUIdx arm_mmu_idx = core_to_arm_mmu_idx(env, mmu_idx);
-
- target_el = exception_target_el(env);
- if (fi->stage2) {
- target_el = 2;
- env->cp15.hpfar_el2 = extract64(fi->s2addr, 12, 47) << 4;
- if (arm_is_secure_below_el3(env) && fi->s1ns) {
- env->cp15.hpfar_el2 |= HPFAR_NS;
- }
- }
- same_el = (arm_current_el(env) == target_el);
+ uint32_t fsr, fsc;
if (target_el == 2 || arm_el_is_aa64(env, target_el) ||
arm_s1_regime_using_lpae_format(env, arm_mmu_idx)) {
@@ -88,6 +74,31 @@ static void QEMU_NORETURN arm_deliver_fault(ARMCPU *cpu,
vaddr addr,
fsc = 0x3f;
}
+ *ret_fsc = fsc;
+ return fsr;
+}
+
+static void QEMU_NORETURN arm_deliver_fault(ARMCPU *cpu, vaddr addr,
+ MMUAccessType access_type,
+ int mmu_idx, ARMMMUFaultInfo *fi)
+{
+ CPUARMState *env = &cpu->env;
+ int target_el;
+ bool same_el;
+ uint32_t syn, exc, fsr, fsc;
+
+ target_el = exception_target_el(env);
+ if (fi->stage2) {
+ target_el = 2;
+ env->cp15.hpfar_el2 = extract64(fi->s2addr, 12, 47) << 4;
+ if (arm_is_secure_below_el3(env) && fi->s1ns) {
+ env->cp15.hpfar_el2 |= HPFAR_NS;
+ }
+ }
+ same_el = (arm_current_el(env) == target_el);
+
+ fsr = compute_fsr_fsc(env, fi, target_el, mmu_idx, &fsc);
+
if (access_type == MMU_INST_FETCH) {
syn = syn_insn_abort(same_el, fi->ea, fi->s1ptw, fsc);
exc = EXCP_PREFETCH_ABORT;
--
2.25.1
- [PULL 03/33] docs: aspeed: Update OpenBMC image URL, (continued)
- [PULL 03/33] docs: aspeed: Update OpenBMC image URL, Peter Maydell, 2021/12/15
- [PULL 02/33] docs: aspeed: Add new boards, Peter Maydell, 2021/12/15
- [PULL 01/33] hw/intc: clean-up error reporting for failed ITS cmd, Peter Maydell, 2021/12/15
- [PULL 07/33] hw/intc/arm_gicv3: Extract gicv3_set_gicv3state from arm_gicv3_cpuif.c, Peter Maydell, 2021/12/15
- [PULL 04/33] docs: aspeed: Give an example of booting a kernel, Peter Maydell, 2021/12/15
- [PULL 11/33] target/arm: Hoist pc_next to a local variable in thumb_tr_translate_insn, Peter Maydell, 2021/12/15
- [PULL 06/33] Fix STM32F2XX USART data register readout, Peter Maydell, 2021/12/15
- [PULL 05/33] docs: aspeed: ADC is now modelled, Peter Maydell, 2021/12/15
- [PULL 10/33] target/arm: Hoist pc_next to a local variable in arm_tr_translate_insn, Peter Maydell, 2021/12/15
- [PULL 12/33] target/arm: Split arm_pre_translate_insn, Peter Maydell, 2021/12/15
- [PULL 14/33] target/arm: Split compute_fsr_fsc out of arm_deliver_fault,
Peter Maydell <=
- [PULL 09/33] target/arm: Hoist pc_next to a local variable in aarch64_tr_translate_insn, Peter Maydell, 2021/12/15
- [PULL 15/33] target/arm: Take an exception if PC is misaligned, Peter Maydell, 2021/12/15
- [PULL 16/33] target/arm: Assert thumb pc is aligned, Peter Maydell, 2021/12/15
- [PULL 17/33] target/arm: Suppress bp for exceptions with more priority, Peter Maydell, 2021/12/15
- [PULL 20/33] include/hw/i386: Don't include qemu-common.h in .h files, Peter Maydell, 2021/12/15
- [PULL 21/33] target/hexagon/cpu.h: don't include qemu-common.h, Peter Maydell, 2021/12/15
- [PULL 13/33] target/arm: Advance pc for arch single-step exception, Peter Maydell, 2021/12/15
- [PULL 18/33] tests/tcg: Add arm and aarch64 pc alignment tests, Peter Maydell, 2021/12/15
- [PULL 19/33] target/i386: Use assert() to sanity-check b1 in SSE decode, Peter Maydell, 2021/12/15
- [PULL 24/33] target/arm: Correct calculation of tlb range invalidate length, Peter Maydell, 2021/12/15