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[PULL 86/88] riscv: Set 5.4 as minimum kernel version for riscv32
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From: |
Alistair Francis |
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Subject: |
[PULL 86/88] riscv: Set 5.4 as minimum kernel version for riscv32 |
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Date: |
Mon, 20 Dec 2021 14:57:03 +1000 |
From: Khem Raj <raj.khem@gmail.com>
5.4 is first stable API as far as rv32 is concerned see [1]
[1]
https://sourceware.org/git/?p=glibc.git;a=commit;h=7a55dd3fb6d2c307a002a16776be84310b9c8989
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Alistair Francis <alistair.francis@wdc.com>
Cc: Bin Meng <bin.meng@windriver.com>
Message-Id: <20211216073111.2890607-1-raj.khem@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
linux-user/riscv/target_syscall.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/linux-user/riscv/target_syscall.h
b/linux-user/riscv/target_syscall.h
index dc597c8972..9b13161324 100644
--- a/linux-user/riscv/target_syscall.h
+++ b/linux-user/riscv/target_syscall.h
@@ -45,10 +45,11 @@ struct target_pt_regs {
#ifdef TARGET_RISCV32
#define UNAME_MACHINE "riscv32"
+#define UNAME_MINIMUM_RELEASE "5.4.0"
#else
#define UNAME_MACHINE "riscv64"
-#endif
#define UNAME_MINIMUM_RELEASE "4.15.0"
+#endif
#define TARGET_MINSIGSTKSZ 2048
#define TARGET_MCL_CURRENT 1
--
2.31.1
- [PULL 85/88] target/riscv: rvv-1.0: Add ELEN checks for widening and narrowing instructions, (continued)
- [PULL 85/88] target/riscv: rvv-1.0: Add ELEN checks for widening and narrowing instructions, Alistair Francis, 2021/12/20
- [PULL 60/88] target/riscv: rvv-1.0: narrowing fixed-point clip instructions, Alistair Francis, 2021/12/20
- [PULL 67/88] target/riscv: rvv-1.0: floating-point min/max instructions, Alistair Francis, 2021/12/20
- [PULL 87/88] target/riscv: Enable bitmanip Zb[abcs] instructions, Alistair Francis, 2021/12/20
- [PULL 84/88] target/riscv: rvv-1.0: update opivv_vadc_check() comment, Alistair Francis, 2021/12/20
- [PULL 43/88] target/riscv: rvv-1.0: register gather instructions, Alistair Francis, 2021/12/20
- [PULL 48/88] target/riscv: rvv-1.0: integer extension instructions, Alistair Francis, 2021/12/20
- [PULL 55/88] target/riscv: rvv-1.0: integer comparison instructions, Alistair Francis, 2021/12/20
- [PULL 61/88] target/riscv: rvv-1.0: single-width floating-point reduction, Alistair Francis, 2021/12/20
- [PULL 65/88] target/riscv: rvv-1.0: remove vmford.vv and vmford.vf, Alistair Francis, 2021/12/20
- [PULL 86/88] riscv: Set 5.4 as minimum kernel version for riscv32,
Alistair Francis <=
- [PULL 73/88] target/riscv: rvv-1.0: relax RV_VLEN_MAX to 1024-bits, Alistair Francis, 2021/12/20
- [PULL 77/88] target/riscv: rvv-1.0: floating-point reciprocal square-root estimate instruction, Alistair Francis, 2021/12/20
- [PULL 63/88] target/riscv: rvv-1.0: single-width scaling shift instructions, Alistair Francis, 2021/12/20
- [PULL 74/88] target/riscv: rvv-1.0: implement vstart CSR, Alistair Francis, 2021/12/20
- [PULL 58/88] target/riscv: rvv-1.0: slide instructions, Alistair Francis, 2021/12/20
- [PULL 64/88] target/riscv: rvv-1.0: remove widening saturating scaled multiply-add, Alistair Francis, 2021/12/20
- [PULL 71/88] target/riscv: add "set round to odd" rounding mode helper function, Alistair Francis, 2021/12/20
- [PULL 66/88] target/riscv: rvv-1.0: remove integer extract instruction, Alistair Francis, 2021/12/20
- [PULL 62/88] target/riscv: rvv-1.0: widening floating-point reduction instructions, Alistair Francis, 2021/12/20
- [PULL 88/88] hw/riscv: Use load address rather than entry point for fw_dynamic next_addr, Alistair Francis, 2021/12/20