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Re: [PATCH v4 12/42] hw/pci/cxl: Create a CXL bus type


From: Alex Bennée
Subject: Re: [PATCH v4 12/42] hw/pci/cxl: Create a CXL bus type
Date: Thu, 27 Jan 2022 12:05:00 +0000
User-agent: mu4e 1.7.6; emacs 28.0.91

Jonathan Cameron <Jonathan.Cameron@huawei.com> writes:

> From: Ben Widawsky <ben.widawsky@intel.com>
>
> The easiest way to differentiate a CXL bus, and a PCIE bus is using a
> flag. A CXL bus, in hardware, is backward compatible with PCIE, and
> therefore the code tries pretty hard to keep them in sync as much as
> possible.
>
> The other way to implement this would be to try to cast the bus to the
> correct type. This is less code and useful for debugging via simply
> looking at the flags.
>
> Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

-- 
Alex Bennée



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