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[PATCH RFCv2 4/4] i386/pc: Restrict AMD-only enforcing of valid IOVAs to
From: |
Joao Martins |
Subject: |
[PATCH RFCv2 4/4] i386/pc: Restrict AMD-only enforcing of valid IOVAs to new machine type |
Date: |
Mon, 7 Feb 2022 20:24:22 +0000 |
The added enforcing is only relevant in the case of AMD where the
range right before the 1TB is restricted and cannot be DMA mapped
by the kernel consequently leading to IOMMU INVALID_DEVICE_REQUEST
or possibly other kinds of IOMMU events in the AMD IOMMU.
Although, there's a case where it may make sense to disable the
IOVA relocation/validation when migrating from a
non-valid-IOVA-aware qemu to one that supports it.
Relocating RAM regions to after the 1Tb hole has consequences for
guest ABI because we are changing the memory mapping, so make
sure that only new machine enforce but not older ones.
Signed-off-by: Joao Martins <joao.m.martins@oracle.com>
---
hw/i386/pc.c | 5 +++++
hw/i386/pc_piix.c | 2 ++
hw/i386/pc_q35.c | 2 ++
include/hw/i386/pc.h | 1 +
4 files changed, 10 insertions(+)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index f8712eb8427e..e62d446b28c7 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -844,6 +844,10 @@ static void relocate_4g(MachineState *machine,
PCMachineState *pcms)
uint32_t eax, vendor[3];
hwaddr maxphysaddr;
+ if (!pcmc->enforce_valid_iova) {
+ return;
+ }
+
host_cpuid(0x0, 0, &eax, &vendor[0], &vendor[2], &vendor[1]);
if (!IS_AMD_VENDOR(vendor)) {
return;
@@ -1787,6 +1791,7 @@ static void pc_machine_class_init(ObjectClass *oc, void
*data)
pcmc->has_reserved_memory = true;
pcmc->kvmclock_enabled = true;
pcmc->enforce_aligned_dimm = true;
+ pcmc->enforce_valid_iova = true;
/* BIOS ACPI tables: 128K. Other BIOS datastructures: less than 4K reported
* to be used at the moment, 32K should be enough for a while. */
pcmc->acpi_data_size = 0x20000 + 0x8000;
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index d9b344248dac..ccf8b6d9895f 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -429,9 +429,11 @@ DEFINE_I440FX_MACHINE(v7_0, "pc-i440fx-7.0", NULL,
static void pc_i440fx_6_2_machine_options(MachineClass *m)
{
+ PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
pc_i440fx_7_0_machine_options(m);
m->alias = NULL;
m->is_default = false;
+ pcmc->enforce_valid_iova = false;
compat_props_add(m->compat_props, hw_compat_6_2, hw_compat_6_2_len);
compat_props_add(m->compat_props, pc_compat_6_2, pc_compat_6_2_len);
}
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 1780f79bc127..1022abf4953d 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -373,8 +373,10 @@ DEFINE_Q35_MACHINE(v7_0, "pc-q35-7.0", NULL,
static void pc_q35_6_2_machine_options(MachineClass *m)
{
+ PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
pc_q35_7_0_machine_options(m);
m->alias = NULL;
+ pcmc->enforce_valid_iova = false;
compat_props_add(m->compat_props, hw_compat_6_2, hw_compat_6_2_len);
compat_props_add(m->compat_props, pc_compat_6_2, pc_compat_6_2_len);
}
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 9c9f4ac74810..10dba9767861 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -117,6 +117,7 @@ struct PCMachineClass {
bool has_reserved_memory;
bool enforce_aligned_dimm;
bool broken_reserved_end;
+ bool enforce_valid_iova;
/* generate legacy CPU hotplug AML */
bool legacy_cpu_hotplug;
--
2.17.2
- Re: [PATCH RFCv2 2/4] i386/pc: relocate 4g start to 1T where applicable, (continued)
- Re: [PATCH RFCv2 2/4] i386/pc: relocate 4g start to 1T where applicable, Dr. David Alan Gilbert, 2022/02/22
- Re: [PATCH RFCv2 2/4] i386/pc: relocate 4g start to 1T where applicable, Gerd Hoffmann, 2022/02/22
- Re: [PATCH RFCv2 2/4] i386/pc: relocate 4g start to 1T where applicable, Igor Mammedov, 2022/02/23
- Re: [PATCH RFCv2 2/4] i386/pc: relocate 4g start to 1T where applicable, Dr. David Alan Gilbert, 2022/02/23
- Re: [PATCH RFCv2 2/4] i386/pc: relocate 4g start to 1T where applicable, Igor Mammedov, 2022/02/23
- Re: [PATCH RFCv2 2/4] i386/pc: relocate 4g start to 1T where applicable, Joao Martins, 2022/02/18
- Re: [PATCH RFCv2 2/4] i386/pc: relocate 4g start to 1T where applicable, Igor Mammedov, 2022/02/21
- Re: [PATCH RFCv2 2/4] i386/pc: relocate 4g start to 1T where applicable, Joao Martins, 2022/02/21
- Re: [PATCH RFCv2 2/4] i386/pc: relocate 4g start to 1T where applicable, Joao Martins, 2022/02/22
- Re: [PATCH RFCv2 2/4] i386/pc: relocate 4g start to 1T where applicable, Igor Mammedov, 2022/02/23
[PATCH RFCv2 4/4] i386/pc: Restrict AMD-only enforcing of valid IOVAs to new machine type,
Joao Martins <=
[PATCH RFCv2 3/4] i386/pc: warn if phys-bits is too low, Joao Martins, 2022/02/07
- Re: [PATCH RFCv2 3/4] i386/pc: warn if phys-bits is too low, David Edmondson, 2022/02/14
- Re: [PATCH RFCv2 3/4] i386/pc: warn if phys-bits is too low, Igor Mammedov, 2022/02/14
- Re: [PATCH RFCv2 3/4] i386/pc: warn if phys-bits is too low, Joao Martins, 2022/02/23
- Re: [PATCH RFCv2 3/4] i386/pc: warn if phys-bits is too low, Igor Mammedov, 2022/02/24
- Re: [PATCH RFCv2 3/4] i386/pc: warn if phys-bits is too low, Joao Martins, 2022/02/24