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RE: [PATCH v2 06/12] Hexagon (tests/tcg/hexagon) test instructions that
From: |
Taylor Simpson |
Subject: |
RE: [PATCH v2 06/12] Hexagon (tests/tcg/hexagon) test instructions that might set bits in USR |
Date: |
Fri, 11 Feb 2022 04:09:39 +0000 |
> -----Original Message-----
> From: Richard Henderson <richard.henderson@linaro.org>
> Sent: Thursday, February 10, 2022 7:03 PM
> To: Taylor Simpson <tsimpson@quicinc.com>; qemu-devel@nongnu.org
> Cc: f4bug@amsat.org; ale@rev.ng; Brian Cain <bcain@quicinc.com>; Michael
> Lambert <mlambert@quicinc.com>
> Subject: Re: [PATCH v2 06/12] Hexagon (tests/tcg/hexagon) test instructions
> that might set bits in USR
>
> On 2/10/22 13:15, Taylor Simpson wrote:
> > +#define CLEAR_USRBITS \
> > + "r2 = usr\n\t" \
> > + "r2 = clrbit(r2, #0)\n\t" \
> > + "r2 = clrbit(r2, #1)\n\t" \
> > + "r2 = clrbit(r2, #2)\n\t" \
> > + "r2 = clrbit(r2, #3)\n\t" \
> > + "r2 = clrbit(r2, #4)\n\t" \
> > + "r2 = clrbit(r2, #5)\n\t" \
> > + "usr = r2\n\t"
>
> It's just a test case, so it doesn't really matter, but
>
> r2 = and(r2, #~0x3f)
Our assembler won't parse the ~. So, I'll have to go with 0xfffffc0.
Taylor
- Re: [PATCH v2 08/12] Hexagon (tests/tcg/hexagon) update overflow test, (continued)
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- [PATCH v2 04/12] Hexagon (target/hexagon) properly handle SNaN in dfmin/dfmax/sfmin/sfmax, Taylor Simpson, 2022/02/09
- [PATCH v2 11/12] Hexagon (target/hexagon) make VyV operands use a unique temp, Taylor Simpson, 2022/02/09
- [PATCH v2 05/12] Hexagon (target/hexagon) properly handle denorm in arch_sf_recip_common, Taylor Simpson, 2022/02/09
- [PATCH v2 06/12] Hexagon (tests/tcg/hexagon) test instructions that might set bits in USR, Taylor Simpson, 2022/02/09
- [PATCH v2 09/12] Hexagon (tests/tcg/hexagon) fix inline asm in preg_alias.c, Taylor Simpson, 2022/02/09
- [PATCH v2 01/12] Hexagon (target/hexagon) fix bug in circular addressing, Taylor Simpson, 2022/02/09
- [PATCH v2 07/12] Hexagon (tests/tcg/hexagon) add floating point instructions to usr.c, Taylor Simpson, 2022/02/09