Re: [PATCH] target/ppc: raise HV interrupts for partition table entry problems

[Fabiano Rosas]

Nicholas Piggin <npiggin@gmail.com> writes:

> Invalid or missing partition table entry exceptions should cause HV
> interrupts. HDSISR is set to bad MMU config, which is consistent with
> the ISA and experimentally matches what POWER9 generates.
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>

Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com>

> ---
>  target/ppc/mmu-radix64.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c
> index 040c055bff..54fb3ce98d 100644
> --- a/target/ppc/mmu-radix64.c
> +++ b/target/ppc/mmu-radix64.c
> @@ -560,13 +560,13 @@ static bool ppc_radix64_xlate_impl(PowerPCCPU *cpu, 
> vaddr eaddr,
>      } else {
>          if (!ppc64_v3_get_pate(cpu, lpid, &pate)) {
>              if (guest_visible) {
> -                ppc_radix64_raise_si(cpu, access_type, eaddr, DSISR_NOPTE);
> +                ppc_radix64_raise_hsi(cpu, access_type, eaddr, eaddr, 
> DSISR_R_BADCONFIG);
>              }
>              return false;
>          }
>          if (!validate_pate(cpu, lpid, &pate)) {
>              if (guest_visible) {
> -                ppc_radix64_raise_si(cpu, access_type, eaddr, 
> DSISR_R_BADCONFIG);
> +                ppc_radix64_raise_hsi(cpu, access_type, eaddr, eaddr, 
> DSISR_R_BADCONFIG);
>              }
>              return false;
>          }