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Re: [PATCH v2 03/15] target/arm: Fault on invalid TCR_ELx.TxSZ
From: |
Peter Maydell |
Subject: |
Re: [PATCH v2 03/15] target/arm: Fault on invalid TCR_ELx.TxSZ |
Date: |
Tue, 15 Feb 2022 21:51:06 +0000 |
On Thu, 10 Feb 2022 at 04:04, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Without FEAT_LVA, the behaviour of programming an invalid value
> is IMPLEMENTATION DEFINED. With FEAT_LVA, programming an invalid
> minimum value requires a Translation fault.
>
> It is most self-consistent to choose to generate the fault always.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> v2: Continue to bound in aa64_va_parameters, so that PAuth gets
> something it can use, but provide a flag for get_phys_addr_lpae
> to raise a fault.
> ---
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
thanks
-- PMM
- [PATCH v2 00/15] target/arm: Implement LVA, LPA, LPA2 features, Richard Henderson, 2022/02/09
- [PATCH v2 01/15] hw/registerfields: Add FIELD_SEX<N> and FIELD_SDP<N>, Richard Henderson, 2022/02/09
- [PATCH v2 02/15] target/arm: Set TCR_EL1.TSZ for user-only, Richard Henderson, 2022/02/09
- [PATCH v2 04/15] target/arm: Move arm_pamax out of line, Richard Henderson, 2022/02/09
- [PATCH v2 03/15] target/arm: Fault on invalid TCR_ELx.TxSZ, Richard Henderson, 2022/02/09
- Re: [PATCH v2 03/15] target/arm: Fault on invalid TCR_ELx.TxSZ,
Peter Maydell <=
- [PATCH v2 05/15] target/arm: Pass outputsize down to check_s2_mmu_setup, Richard Henderson, 2022/02/09
- [PATCH v2 07/15] target/arm: Honor TCR_ELx.{I}PS, Richard Henderson, 2022/02/09
- [PATCH v2 08/15] target/arm: Prepare DBGBVR and DBGWVR for FEAT_LVA, Richard Henderson, 2022/02/09
- [PATCH v2 09/15] target/arm: Implement FEAT_LVA, Richard Henderson, 2022/02/09
- [PATCH v2 10/15] target/arm: Implement FEAT_LPA, Richard Henderson, 2022/02/09