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Re: [PATCH 06/27] target/ppc: cpu_init: Move 405 SPRs into register_405_
From: |
David Gibson |
Subject: |
Re: [PATCH 06/27] target/ppc: cpu_init: Move 405 SPRs into register_405_sprs |
Date: |
Wed, 16 Feb 2022 13:13:13 +1100 |
On Tue, Feb 15, 2022 at 06:41:27PM -0300, Fabiano Rosas wrote:
> Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> target/ppc/cpu_init.c | 24 +++++++++++++-----------
> 1 file changed, 13 insertions(+), 11 deletions(-)
>
> diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
> index 1eef006a04..330b765ba9 100644
> --- a/target/ppc/cpu_init.c
> +++ b/target/ppc/cpu_init.c
> @@ -1425,6 +1425,18 @@ static void register_405_sprs(CPUPPCState *env)
> SPR_NOACCESS, SPR_NOACCESS,
> spr_read_generic, &spr_write_generic,
> 0x00000000);
> +
> + /* Bus access control */
> + /* not emulated, as QEMU never does speculative access */
> + spr_register(env, SPR_40x_SGR, "SGR",
> + SPR_NOACCESS, SPR_NOACCESS,
> + &spr_read_generic, &spr_write_generic,
> + 0xFFFFFFFF);
> + /* not emulated, as QEMU do not emulate caches */
> + spr_register(env, SPR_40x_DCWR, "DCWR",
> + SPR_NOACCESS, SPR_NOACCESS,
> + &spr_read_generic, &spr_write_generic,
> + 0x00000000);
> }
>
>
> @@ -2320,17 +2332,7 @@ static void init_proc_405(CPUPPCState *env)
> register_40x_sprs(env);
> register_405_sprs(env);
> register_usprgh_sprs(env);
> - /* Bus access control */
> - /* not emulated, as QEMU never does speculative access */
> - spr_register(env, SPR_40x_SGR, "SGR",
> - SPR_NOACCESS, SPR_NOACCESS,
> - &spr_read_generic, &spr_write_generic,
> - 0xFFFFFFFF);
> - /* not emulated, as QEMU do not emulate caches */
> - spr_register(env, SPR_40x_DCWR, "DCWR",
> - SPR_NOACCESS, SPR_NOACCESS,
> - &spr_read_generic, &spr_write_generic,
> - 0x00000000);
> +
> /* Memory management */
> #if !defined(CONFIG_USER_ONLY)
> env->nb_tlb = 64;
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- Re: [PATCH 03/27] target/ppc: cpu_init: Group registration of generic SPRs, (continued)
- [PATCH 02/27] target/ppc: cpu_init: Remove G2LE init code, Fabiano Rosas, 2022/02/15
- [PATCH 01/27] target/ppc: cpu_init: Remove not implemented comments, Fabiano Rosas, 2022/02/15
- [PATCH 04/27] target/ppc: cpu_init: Move Timebase registration into the common function, Fabiano Rosas, 2022/02/15
- [PATCH 05/27] target/ppc: cpu_init: Avoid nested SPR register functions, Fabiano Rosas, 2022/02/15
- [PATCH 06/27] target/ppc: cpu_init: Move 405 SPRs into register_405_sprs, Fabiano Rosas, 2022/02/15
- Re: [PATCH 06/27] target/ppc: cpu_init: Move 405 SPRs into register_405_sprs,
David Gibson <=
- [PATCH 07/27] target/ppc: cpu_init: Move G2 SPRs into register_G2_sprs, Fabiano Rosas, 2022/02/15
- [PATCH 10/27] target/ppc: cpu_init: Deduplicate 440 SPR registration, Fabiano Rosas, 2022/02/15
- [PATCH 09/27] target/ppc: cpu_init: Decouple 74xx SPR registration from 7xx, Fabiano Rosas, 2022/02/15
- [PATCH 08/27] target/ppc: cpu_init: Decouple G2 SPR registration from 755, Fabiano Rosas, 2022/02/15
- [PATCH 11/27] target/ppc: cpu_init: Deduplicate 603 SPR registration, Fabiano Rosas, 2022/02/15